Inventor profile of:

Jonathan F. Lee

City:

Dublin, California

Country:

United States

Published Applications:

13

Last publication date:

2010-10-14

Top Assignees for applications by Jonathan F. Lee

The entities that hold a legal rights for patent applications filed by inventor Lee Jonathan F.:

Recent patent applications by Lee Jonathan F.

Jonathan F. Lee from Dublin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2010-10-14
US20100262856A1
Physics

Operating mode for extreme power savings when no network presence is detected

#2 | 2010-08-19
US20100207685A1
Physics

Method and system for safe and efficient chip power down drawing minimal current when a device is not enabled

#3 | 2010-01-07
US20100005231A1
Physics

Method and system for hardware implementation of resetting an external two-wired EEPROM

#4 | 2008-08-28
US20080209076A1
Electricity

METHOD AND SYSTEM FOR FAST ETHERNET CONTROLLER OPERATION USING A VIRTUAL CPU

#5 | 2008-08-14
US20080195883A1
Physics

Method and system for hardware implementation of resetting an external two-wired EEPROM

#6 | 2008-03-20
US20080071979A1
Physics

Automatically detecting types of external data flash devices

#7 | 2007-05-10
US20070106920A1
Physics

Operating mode for extreme power savings when no network presence is detected

#8 | 2007-05-10
US20070104124A1
Electricity

Cable sense mode for intelligent power saving in absence of link pulse

#9 | 2007-02-01
US20070028087A1
Physics

Method and system for reducing instruction storage space for a processor integrated in a network adapter chip

#10 | 2007-02-01
US20070028084A1
Electricity

Method and system for a self-booting Ethernet controller

#11 | 2007-02-01
US20070028083A1
Electricity

Method and system for modifying operation of ROM based boot code of a network adapter chip

#12 | 2007-01-18
US20070016728A1
Physics

Automatically detecting types of external data flash devices

#13 | 2006-12-21
US20060288245A1
Physics

Method and system for safe and efficient chip power down drawing minimal current when a device is not enabled

InventorID:

3672777 ⎘