Austin, Texas
United States
52
2019-10-03
The entities that hold a legal rights for patent applications filed by inventor Weekly Roger D.:
Roger D. Weekly from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Electronic module power supply
#2 | 2019-01-10Electronic module power supply
#3 | 2018-12-06Implementing high-speed signaling via dedicated printed circuit-board media
#4 | 2018-07-26Crosstalk reduction between signal layers in a multilayered package by variable-width mesh plane structures
#5 | 2016-09-01Electronic module power supply
#6 | 2014-11-13Crosstalk reduction between signal layers in a multilayered package by variable-width mesh plane structures
#7 | 2014-03-20Multi-layer circuit substrate fabrication method providing improved transmission line integrity and increased routing density
#8 | 2014-03-20Implementing high-speed signaling via dedicated printed circuit-board media
#9 | 2014-01-30System for designing substrates having reference plane voids with strip segments
#10 | 2014-01-30Electronic module power supply
#11 | 2013-04-11Ball grid array with improved single-ended and differential signal performance
#12 | 2013-02-28Motherboard assembly for interconnecting and distributing signals and power
#13 | 2013-01-17Ball grid array with improved single-ended and differential signal performance
#14 | 2012-12-27Circuit manufacturing and design techniques for reference plane voids with strip segment
#15 | 2012-12-27Circuit manufacturing and design techniques for reference plane voids with strip segment
#16 | 2012-05-24Crosstalk reduction between signal layers in a multilayered package by variable-width mesh plane structures
#17 | 2012-05-17System and method for multi-application socket
#18 | 2012-04-05Implementing high-speed signaling via dedicated printed circuit-board media
#19 | 2012-04-05Method of attaching an electronic module power supply
#20 | 2012-04-05System and method for integrated circuit module tamperproof mode personalization
#21 | 2012-01-05Ball grid array with improved single-ended and differential signal performance
#22 | 2011-11-03Testing an optical fiber connection
#23 | 2011-06-23Structure for enhancing reference return current conduction
#24 | 2011-04-14Motherboard assembly for interconnecting and distributing signals and power
#25 | 2010-10-14Circuit manufacturing and design techniques for reference plane voids with strip segment
#26 | 2010-02-25Enhanced thermal management for improved module reliability
#27 | 2010-02-25Tracking thermal mini-cycle stress
#28 | 2010-02-11Multi-layer circuit substrate fabrication and design methods providing improved transmission line integrity and increased routing density
#29 | 2009-07-30Auto-router performing simultaneous placement of signal and return paths
#30 | 2009-07-23Reference plane voids with strip segment for improving transmission line integrity over vias
#31 | 2009-04-09Statistical switched capacitor droop sensor for application in power distribution noise mitigation
#32 | 2009-03-05Application of multiple voltage droop detection
#33 | 2009-03-05Application of multiple voltage droop detection and instruction throttling instances with customized thresholds across a semiconductor chip
#34 | 2009-02-19Method for detecting noise events in systems with time variable operating points
#35 | 2009-01-29Design method and system for minimizing blind via current loops
#36 | 2008-12-11System and method for electronic device development
#37 | 2008-11-27System and method for power domain optimization
#38 | 2008-11-27Power delivery analysis and design
#39 | 2008-11-27Apparatus for crack prevention in integrated circuit packages
#40 | 2008-11-27Multi-layer circuit substrate and method having improved transmission line integrity and increased routing density
#41 | 2008-09-18System and Method of Integrated Circuit Control for in Situ Impedance Measurement
#42 | 2008-04-17Ceramic package in which far end noise is reduced using capacitive cancellation by offset wiring
#43 | 2008-04-17Ceramic Package in Which Far End Noise is Reduced Using Capacitive Cancellation by Offset Wiring
#44 | 2007-12-13Method for detecting noise events in systems with time variable operating points
#45 | 2007-12-06Mitigate power supply noise response by throttling execution units based upon voltage sensing
#46 | 2007-11-08System DC Analysis Methodology
#47 | 2007-10-25Method and computer program product for designing power distribution system in a circuit
#48 | 2007-10-11Apparatus and method for selectively monitoring multiple voltages in an IC or other electronic chip
#49 | 2007-08-16Fabricating substrates having low inductance via arrangements
#50 | 2006-12-07Apparatus and method for far end noise reduction using capacitive cancellation by offset wiring
#51 | 2006-03-21Triangular assignment of pins used for diagonal interconnections between diagonal chips in a multi-chip module
#52 | 2005-04-26Routing for multilayer ceramic substrates to reduce excessive via depth
36884 ⎘