Michael J. Shapiro

System, method and computer program product for data transfer management

Dust guard structure

Dust guard structure

Dust guard structure

System, method and computer program product for data transfer management

Corrosion resistant chip sidewall connection with crackstop and hermetic seal

Electrical connection around a crackstop structure

Multicore processor and method of use that configures core functions based on executing instructions

NESTED HELICAL INDUCTOR

NESTED-HELICAL TRANSFORMER

Structure for logic circuit and serializer-deserializer stack

Structure for logic circuit and serializer-deserializer stack

Integrated decoupling capacitor employing conductive through-substrate vias

Stacked through-silicon via (TSV) transformer structure

Coil inductor for on-chip or on-chip stack

Solder ball contact susceptible to lower stress

Semiconductor structure having offset passivation to reduce electromigration

Solder ball contact susceptible to lower stress

Noise suppressor for semiconductor packages

Data and control encryption

Semiconductor article having a through silicon via and guard ring

System, method and computer program product for data transfer management

Integrated decoupling capacitor employing conductive through-substrate vias

Multicore processor and method of use that configures core functions based on executing instructions

Configuring plural cores to perform an instruction having a multi-core characteristic

Structure for an apparatus for monitoring and controlling heat generation in a multi-core processor

Dynamic processor reconfiguration for low power without reducing performance based on workload execution characteristics

Power-aware line intervention for a multiprocessor snoop coherency protocol

Power-aware line intervention for a multiprocessor directory-based coherency protocol

Power grid structure to optimize performance of a multiple core processor

Uniform power density across processor cores at burn-in

Silicon Multiple Core or Redundant Unit Optimization Tool

Method and structure for optimizing yield of 3-D chip manufacture

Method and System for Using Multiple-Core Integrated Circuits

Multiple-Core Processor

Power grid structure to optimize performance of a multiple core processor

Apparatus and method for customized burn-in of cores on a multicore microprocessor integrated circuit chip

Method and structure for optimizing yield of 3-D chip manufacture