Inventor profile of:

Junichi Yano

City:

Osaka

Country:

Japan

Published Applications:

13

Last publication date:

2010-12-09

Top Assignees for applications by Junichi Yano

The entities that hold a legal rights for patent applications filed by inventor Yano Junichi:

Recent patent applications by Yano Junichi

Junichi Yano from Osaka, JP has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2010-12-09
US20100308905A1
Electricity

Semiconductor integrated circuit and method of designing semiconductor integrated circuit

#2 | 2010-06-17
US20100148235A1
Electricity

Semiconductor integrated circuit, standard cell, standard cell library, semiconductor integrated circuit designing method, and semiconductor integrated circuit designing equipment

#3 | 2008-11-27
US20080290376A1
Electricity

Semiconductor Integrated Circuit

#4 | 2007-09-06
US20070205451A1
Electricity

Semiconductor integrated circuit and method of designing semiconductor integrated circuit

#5 | 2007-05-03
US20070096154A1
Electricity

Standard cell

#6 | 2007-04-10
US10339322
-

Delay control circuit device, and a semiconductor integrated circuit device and a delay control method using said delay control circuit device

#7 | 2007-01-04
US20070004147A1
Electricity

Semiconductor integrated circuit, standard cell, standard cell library, semiconductor integrated circuit designing method, and semiconductor integrated circuit designing equipment

#8 | 2006-06-08
US20060119392A1
Electricity

Semiconductor integrated circuit and layout design method thereof, and standard cell

#9 | 2006-02-09
US20060028246A1
Electricity

Dynamic circuit

#10 | 2005-12-22
US20050280031A1
Electricity

Standard cell, standard cell library, and semiconductor integrated circuit with suppressed variation in characteristics

#11 | 2005-11-22
US10616908
-

Dynamic circuit

#12 | 2005-06-30
US20050144515A1
Physics

Semiconductor integrated circuit

#13 | 2005-05-31
US10001967
-

Integrated circuit with CPU and FPGA for reserved instructions execution with configuration diagnosis

InventorID:

3708660 ⎘