Inventor profile of:

Mark S. Moir

City:

Hampton, New Hampshire

Country:

United States

Published Applications:

28

Last publication date:

2011-07-19

Top Assignees for applications by Mark S. Moir

The entities that hold a legal rights for patent applications filed by inventor Moir Mark S.:

Recent patent applications by Moir Mark S.

Mark S. Moir from Hampton, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2011-07-19
US11226949
-

Composite abortable locks

#2 | 2010-12-30
US20100333093A1
Physics

Facilitating transactional execution through feedback about misspeculation

#3 | 2010-12-30
US20100332901A1
Physics

Advice-based feedback for transactional execution

#4 | 2010-05-04
US11008692
-

Read sharing using global conflict indication and semi-transparent reading in a transactional memory space

#5 | 2010-03-16
US11026849
-

Practical implementation of arbitrary-sized LL/SC variables

#6 | 2009-08-18
US11026255
-

Space-adaptive lock-free queue using pointer-sized single-target synchronization

#7 | 2009-05-12
US11026850
-

Space-adaptive lock-free free-list using pointer-sized single-target synchronization

#8 | 2009-02-24
US11110910
-

Controlling contention via transactional timers among conflicting transactions issued by processors operating in insistent or polite mode

#9 | 2008-07-24
US20080177959A1
Physics

System and method for executing transactions

#10 | 2008-07-08
US11195093
-

Avoiding locks by transactionally executing critical sections

#11 | 2008-05-29
US20080127035A1
Physics

Watchpoints on transactional variables

#12 | 2008-04-01
US11078117
-

Shared lease instruction support for transient blocking synchronization

#13 | 2008-03-18
US11078120
-

Exclusive lease instruction support for transient blocking synchronization

#14 | 2008-03-06
US20080059470A1
Physics

Method and system for implementing a concurrent set of objects

#15 | 2008-01-10
US20080010532A1
Physics

Breakpoints in a transactional memory-based representation of code

#16 | 2008-01-03
US20080005193A1
Physics

Delayed breakpoints

#17 | 2007-12-13
US20070288902A1
Physics

Replay debugging

#18 | 2007-12-13
US20070288901A1
Physics

Viewing and modifying transactional variables

#19 | 2007-12-13
US20070288900A1
Physics

Atomic groups for debugging

#20 | 2007-08-09
US20070186069A1
Physics

Coordinating accesses to shared objects using transactional memory mechanisms and non-transactional software mechanisms

#21 | 2007-07-05
US20070157202A1
Physics

Ensuring progress in a system that supports execution of obstruction-free operations

#22 | 2007-03-08
US20070055960A1
Physics

System and method for supporting multiple alternative methods for executing transactions

#23 | 2007-02-22
US20070043933A1
Physics

Instruction set architecture employing conditional multistore synchronization

#24 | 2007-02-22
US20070043915A1
Physics

Conditional synchronization mechanisms allowing multiple store operations to become visible while a flagged memory location is owned and remains unchanged

#25 | 2006-09-28
US20060218561A1
Physics

Code preparation technique employing lock-free pointer operations

#26 | 2006-08-03
US20060173885A1
Physics

Obstruction-free data structures and mechanisms with separable and/or substitutable contention management mechanisms

#27 | 2006-06-08
US20060123156A1
Physics

Scalable method for producer and consumer elimination

#28 | 2006-02-16
US20060037026A1
Physics

Lightweight reference counting using single-target synchronization

InventorID:

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