Anthony L. COYLE

Multi lead frame power package

Thermally enhanced single inline package (SIP)

Non-pull back pad package with an additional solder standoff

Flip chip package with advanced electrical and thermal properties for high current designs

Microelectronic Assembly Using Chip-On-Lead (COL) and Cantilever Leads

STRESS-IMPROVED FLIP-CHIP SEMICONDUCTOR DEVICE HAVING HALF-ETCHED LEADFRAME

Non-pull back pad package with an additional solder standoff

Multi Lead Frame Power Package

Integrated Circuits Having Controlled Inductances

Integrated circuit chip packaging assembly

Method for fabricating low resistance, low inductance interconnections in high current semiconductor devices

High current semiconductor device system having low resistance and inductance

Semiconductor Package Having Integrated Metal Parts for Thermal Enhancement

Flip chip package with advanced electrical and thermal properties for high current designs

Multi lead frame power package

Integrated circuit chip packaging assembly

Molded package for micromechanical devices and method of fabrication

Semiconductor package having integrated metal parts for thermal enhancement

Wafer-level assembly method for chip-size devices having flipped chips

Plastic chip-scale package having integrated passive components

Plastic dual-in-line packaging (PDIP) having enhanced heat dissipation

Method of fabricating a molded package for micromechanical devices