Inventor profile of:

Simone Bartoli

City:

Cambiago

Country:

Italy

Published Applications:

22

Last publication date:

2010-06-17

Top Assignees for applications by Simone Bartoli

The entities that hold a legal rights for patent applications filed by inventor Bartoli Simone:

Recent patent applications by Bartoli Simone

Simone Bartoli from Cambiago, IT has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2010-06-17
US20100149896A1
Physics

Sense amplifier

#2 | 2009-04-30
US20090109754A1
Physics

Non-volatile memory array architecture with joined word lines

#3 | 2008-10-09
US20080250191A1
Physics

Flexible, low cost apparatus and method to introduce and check algorithm modifications in a non-volatile memory

#4 | 2008-07-17
US20080170455A1
Physics

Compensated current offset in a sensing circuit

#5 | 2008-07-17
US20080170441A1
Physics

Sense architecture

#6 | 2008-07-10
US20080165585A1
Physics

Erase verify method for NAND-type flash memories

#7 | 2008-06-19
US20080144379A1
Physics

Implementation of column redundancy for a flash memory with a high write parallelism

#8 | 2007-04-12
US20070083699A1
Physics

System for configuring parameters for a flash memory

#9 | 2007-04-05
US20070076476A1
Physics

Method and system for regulating a program voltage value during multilevel memory device programming

#10 | 2007-03-01
US20070047325A1
Physics

Method and apparatus for discharging a memory cell in a memory device after an erase operation

#11 | 2006-12-14
US20060279988A1
Physics

System and method for matching resistance in a non-volatile memory

#12 | 2006-11-09
US20060253644A1
Physics

Method and system for configuring parameters for flash memory

#13 | 2006-07-20
US20060161727A1
Physics

Method and system for managing a suspend request in a flash memory

#14 | 2006-06-29
US20060140030A1
Physics

System for performing fast testing during flash reference cell setting

#15 | 2006-06-29
US20060140010A1
Physics

Method and system for reducing soft-writing in a multi-level flash memory

#16 | 2006-06-01
US20060114721A1
Physics

Method and system for regulating a program voltage value during multilevel memory device programming

#17 | 2006-04-20
US20060085622A1
Physics

Method and system for managing address bits during buffered program operations in a memory device

#18 | 2006-04-13
US20060077746A1
Physics

Column decoding architecture for flash memories

#19 | 2006-04-13
US20060077714A1
Physics

Method and system for a programming approach for a nonvolatile electronic device

#20 | 2006-03-23
US20060062063A1
Physics

Compensated method to implement a high voltage discharge phase after erase pulse in a flash memory device

#21 | 2005-11-08
US10328721
-

Autotesting method of a memory cell matrix, particularly of the non-volatile type

#22 | 2005-02-08
US9717938
-

Non-volatile memory device with burst mode reading and corresponding reading method

InventorID:

3801711 ⎘