Micron Technology, Inc.

Stripe-based non-volatile multilevel memory operation

Apparatus and method for reduced peak power consumption during common operation of multi-nand flash memory devices

Memory address translation

Metadata storage associated with wear-level operation requests

Dynamic SLC/MLC blocks allocations for non-volatile memory

STACKED NON-VOLATILE MEMORY WITH SILICON CARBIDE-BASED AMORPHOUS SILICON THIN FILM TRANSISTORS

Hafnium tantalum titanium oxide films

Apparatus configured to program a memory cell to a target threshold voltage representing a data pattern of more than one bit

Semiconductor with through-substrate interconnect

Memcapacitor devices, field effect transistor devices, and, non-volatile memory arrays

Memory cell arrays

SEMICONDUCTOR STRUCTURES COMPRISING CRYSTALLINE PrCaMnO (PCMO) FORMED BY ATOMIC LAYER DEPOSITION

USING POSITIVE DC OFFSET OF BIAS RF TO NEUTRALIZE CHARGE BUILD-UP OF ETCH FEATURES

Memory system controller

Stacked microfeature devices and associated methods

Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices

Memory bank signal coupling buffer and method

Memory devices having select gates with P type bodies, memory strings having separate source lines and methods

Voltage switching in a memory device

CURRENT SENSING FOR FLASH

Automatic selective slow program convergence

Multilevel phase change memory operation

Vertically base-connected bipolar transistor

Disabling electrical connections using pass-through 3D interconnects and associated systems and methods

Solid state lighting devices with semi-polar facets and associated methods of manufacturing

USB device communication apparatus, systems, and methods

Method for providing electrical connections to spaced conductive lines

Method of forming pitch multiplied contacts

Phase interpolators and push-pull buffers

Cross-point memory cells, non-volatile memory arrays, methods of reading a memory cell, methods of programming a memory cell, methods of writing to and reading from a memory cell, and computer systems

Memory cell array with semiconductor selection device for multiple memory cells