Inventor profile of:

Cheeman Yu

City:

Madison, Wisconsin

Country:

United States

Published Applications:

17

Last publication date:

2015-08-06

Top Assignees for applications by Cheeman Yu

The entities that hold a legal rights for patent applications filed by inventor Yu Cheeman:

Recent patent applications by Yu Cheeman

Cheeman Yu from Madison, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2015-08-06
US20150223335A1
Electricity

Printed circuit board with coextensive electrical connectors and contact pad areas

#2 | 2015-02-26
US20150054177A1
Electricity

Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging

#3 | 2013-11-14
US20130299959A1
Electricity

Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging

#4 | 2013-08-15
US20130207280A1
Electricity

Semiconductor device with die stack arrangement including staggered die and efficient wire bonding

#5 | 2012-06-28
US20120164828A1
Electricity

Hidden plating traces

#6 | 2012-02-02
US20120025396A1
Electricity

Semiconductor device with die stack arrangement including staggered die and efficient wire bonding

#7 | 2011-12-29
US20110316164A1
Electricity

Corrugated die edge for stacked die semiconductor package

#8 | 2010-11-18
US20100289147A1
Electricity

Semiconductor die having a redistribution layer

#9 | 2010-10-07
US20100255640A1
Electricity

Method of fabricating a two-sided die in a four-sided leadframe based package

#10 | 2010-10-07
US20100252315A1
Electricity

Printed circuit board with coextensive electrical connectors and contact pad areas

#11 | 2010-04-29
US20100102440A1
Electricity

High density three dimensional semiconductor die package

#12 | 2010-03-04
US20100055847A1
Physics

Methods of promoting adhesion between transfer molded IC packages and injection molded plastics for creating over-molded memory cards

#13 | 2010-03-04
US20100055836A1
Electricity

Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages

#14 | 2010-03-04
US20100055835A1
Electricity

Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages

#15 | 2010-03-04
US20100052155A1
Physics

Methods of promoting adhesion between transfer molded IC packages and injection molded plastics for creating over-molded memory cards

#16 | 2009-10-22
US20090263969A1
Electricity

Hidden plating traces

#17 | 2009-10-15
US20090256249A1
Electricity

Stacked, interconnected semiconductor package

InventorID:

384974 ⎘