Inventor profile of:

Jun Wan

City:

Sunnyvale, California

Country:

United States

Published Applications:

24

Last publication date:

2009-01-22

Top Assignees for applications by Jun Wan

The entities that hold a legal rights for patent applications filed by inventor Wan Jun:

Recent patent applications by Wan Jun

Jun Wan from Sunnyvale, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2009-01-22
US20090021983A1
Physics

Word line compensation in non-volatile memory erase operations

#2 | 2008-07-03
US20080158990A1
Physics

Retention margin program verification

#3 | 2008-07-03
US20080158989A1
Physics

Retention margin program verification

#4 | 2008-06-12
US20080137424A1
Physics

Reducing read disturb for non-volatile storage

#5 | 2008-06-12
US20080137423A1
Physics

Reducing read disturb for non-volatile storage

#6 | 2008-06-12
US20080137411A1
Physics

Reducing read disturb for non-volatile storage

#7 | 2008-01-24
US20080019180A1
Physics

Selective program voltage ramp rates in non-volatile memory

#8 | 2007-07-12
US20070159891A1
Physics

Trimming of analog voltages in flash memory devices

#9 | 2007-07-12
US20070159888A1
Physics

Flash memory devices with trimmed analog voltages

#10 | 2007-07-05
US20070153573A1
Physics

System for reducing read disturb for non-volatile storage

#11 | 2007-06-14
US20070133295A1
Physics

Reducing read disturb for non-volatile storage

#12 | 2007-06-07
US20070127291A1
Physics

System for reducing read disturb for non-volatile storage

#13 | 2007-05-15
US11223623
-

Last-first mode and method for programming of non-volatile memory with reduced program disturb

#14 | 2007-02-01
US20070025157A1
Physics

Method for programming non-volatile memory with self-adjusting maximum program loop

#15 | 2007-02-01
US20070025156A1
Physics

System for programming non-volatile memory with self-adjusting maximum program loop

#16 | 2007-01-30
US11223273
-

Last-first mode and apparatus for programming of non-volatile memory with reduced program disturb

#17 | 2006-12-14
US20060279990A1
Physics

Selective application of program inhibit schemes in non-volatile memory

#18 | 2006-06-29
US20060140012A1
Physics

Word line compensation in non-volatile memory erase operations

#19 | 2006-06-22
US20060133156A1
Physics

Systems for comprehensive erase verification in non-volatile memory

#20 | 2006-05-11
US20060098495A1
Physics

Systems for comprehensive erase verification in non-volatile memory

#21 | 2006-05-11
US20060098494A1
Physics

Comprehensive erase verification for non-volatile memory

#22 | 2006-05-11
US20060098493A1
Physics

Comprehensive erase verification for non-volatile memory

#23 | 2006-04-04
US11194827
-

System for programming non-volatile memory with self-adjusting maximum program loop

#24 | 2005-12-01
US20050265081A1
Physics

Comprehensive erase verification for non-volatile memory

InventorID:

3861363 ⎘