Inventor profile of:

Norio Suzuki

City:

Mito

Country:

Japan

Published Applications:

22

Last publication date:

2009-01-29

Top Assignees for applications by Norio Suzuki

The entities that hold a legal rights for patent applications filed by inventor Suzuki Norio:

Recent patent applications by Suzuki Norio

Norio Suzuki from Mito, JP has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2009-01-29
US20090029524A1
Electricity

METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING A TRENCH

#2 | 2008-07-08
US10778081
-

Semiconductor integrated circuit device and a method of manufacturing the same

#3 | 2007-12-27
US20070296030A1
Electricity

Semiconductor integrated circuit device having deposited layer for gate insulation

#4 | 2007-12-20
US20070290275A1
Electricity

Semiconductor integrated circuit device having deposited layer for gate insulation

#5 | 2007-05-24
US20070114631A1
Electricity

Method of manufacturing a semiconductor integrated circuit device and a semiconductor integrated circuit device

#6 | 2007-03-01
US20070048917A1
Electricity

Process for producing semiconductor integrated circuit device

#7 | 2006-12-07
US20060273406A1
Electricity

Semiconductor integrated circuit device having deposited layer for gate insulation

#8 | 2006-09-28
US20060214254A1
Electricity

Semiconductor device and manufacturing method of the same

#9 | 2006-08-01
US10600771
-

Semiconductor device and manufacturing method of the same

#10 | 2006-05-23
US10468441
-

Manufacturing method of polymetal gate electrode

#11 | 2006-04-04
US10635511
-

Semiconductor integrated circuit device having deposited layer for gate insulation

#12 | 2006-01-12
US20060009046A1
Electricity

Method of manufacturing semiconductor integrated circuit device having polymetal gate electrode

#13 | 2005-11-24
US20050260820A1
Electricity

Method of manufacturing a semiconductor integrated circuit device having a trench

#14 | 2005-11-03
US20050245045A1
Electricity

Semiconductor integrated circuit device having deposited layer for gate insulation

#15 | 2005-10-27
US20050239257A1
Electricity

Method of manufacturing a semiconductor integrated circuit device that includes forming an isolation trench around active regions and filling the trench with two insulating films

#16 | 2005-10-27
US20050237603A1
Electricity

Method of manufacturing a semiconductor integrated circuit device that includes forming dummy patterns in an isolation region prior to filling with insulating material

#17 | 2005-09-08
US20050196935A1
Electricity

Semiconductor device and process for producing the same

#18 | 2005-07-07
US20050148155A1
Electricity

Method for manufacturing a semiconductor integrated circuit device that includes covering the bottom of an isolation trench with spin-on glass and etching back the spin-on glass to a predetermined depth

#19 | 2005-04-19
US10392916
-

Semiconductor device and process for producing the same

#20 | 2005-02-22
US10638485
-

Process for producing semiconductor device and semiconductor device produced thereby

#21 | 2005-01-20
US20050014340A1
Electricity

Method of manufacturing a semiconductor integrated circuit device having a trench

#22 | 2005-01-04
US10170359
-

Semiconductor integrated circuit device and method of fabricating the same

InventorID:

3868072 ⎘