Saratoga, California
United States
12
2009-09-24
The entities that hold a legal rights for patent applications filed by inventor Chen Jun-Wei:
Jun-Wei Chen from Saratoga, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Isolation structures for integrated circuits
#2 | 2009-02-05ESD protection for bipolar-CMOS-DMOS integrated circuit devices
#3 | 2009-02-05ESD protection for bipolar-CMOS-DMOS integrated circuit devices
#4 | 2009-02-05ESD protection for bipolar-CMOS-DMOS integrated circuit devices
#5 | 2008-11-27Isolation structures for integrated circuits
#6 | 2008-03-20High-voltage lateral DMOS device with diode clamp
#7 | 2008-03-20High-voltage extended drain MOSFET
#8 | 2008-03-20High-voltage lateral trench MOSFET
#9 | 2008-02-21Modular methods of forming isolation structures for integrated circuits
#10 | 2008-02-07ESD protection for bipolar-CMOS-DMOS integrated circuit devices
#11 | 2007-12-06Isolation structures for integrated circuits and modular methods of forming the same
#12 | 2007-12-06High-voltage lateral DMOS device
3871070 ⎘