Inventor profile of:

Cormac Michael O'CONNELL

City:

Kanata

Country:

Canada

Published Applications:

27

Last publication date:

2026-02-19

Top Assignees for applications by Cormac Michael O'CONNELL

The entities that hold a legal rights for patent applications filed by inventor O'CONNELL Cormac Michael:

Recent patent applications by O'CONNELL Cormac Michael

Cormac Michael O'CONNELL from Kanata, CA has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-02-19
US20260052698A1
Electricity

MEMORY DEVICE AND METHOD FOR FORMING THE SAME

#2 | 2025-03-20
US20250097056A1
Electricity

NOVEL PUF GENERATORS BASED ON SRAM BIT CELLS

#3 | 2024-11-28
US20240396750A1
Electricity

METHOD AND APPARATUS FOR LOGIC CELL-BASED PUF GENERATORS

#4 | 2024-11-07
US20240371674A1
Electricity

Method for PUF generation using variations in transistor threshold voltage and subthreshold leakage current

#5 | 2024-03-07
US20240079257A1
Electricity

Method for PUF generation using variations in transistor threshold voltage and subthreshold leakage current

#6 | 2023-11-30
US20230388135A1
Electricity

Method and apparatus for logic cell-based PUF generators

#7 | 2021-09-23
US20210296151A1
Electricity

Method for PUF generation using variations in transistor threshold voltage and subthreshold leakage current

#8 | 2021-08-12
US20210250191A1
Electricity

PUF generators based on SRAM bit cells

#9 | 2021-03-18
US20210083887A1
Electricity

Method and apparatus for logic cell-based PUF generators

#10 | 2020-03-26
US20200099540A1
Electricity

Method and apparatus for logic cell-based PUF generators

#11 | 2020-03-12
US20200084052A1
Electricity

PUF generators based on SRAM bit cells

#12 | 2020-02-13
US20200051597A1
Physics

Memory architecture having first and second voltages

#13 | 2019-05-30
US20190165938A1
Electricity

Method for PUF generation using variations in transistor threshold voltage and subthreshold leakage current

#14 | 2018-07-12
US20180197582A1
Physics

Memory architecture having first and second voltages

#15 | 2016-09-22
US20160276020A1
Physics

Memory architecture and method of access thereto

#16 | 2016-02-18
US20160049182A1
Physics

Memory architecture having first and second voltages

#17 | 2015-08-20
US20150235716A1
Physics

Self-repairing memory and method of use

#18 | 2015-05-21
US20150143315A1
Physics

Fault injection of finFET devices

#19 | 2015-05-21
US20150138903A1
Physics

Writing to multi-port memories

#20 | 2014-09-18
US20140282332A1
Physics

Fault injection of finFET devices

#21 | 2014-08-28
US20140241087A1
Physics

Sense amplifier

#22 | 2014-08-28
US20140241086A1
Physics

Memory structure

#23 | 2014-05-01
US20140119135A1
Physics

Memory architecture

#24 | 2014-03-20
US20140078844A1
Physics

Memory circuits, systems, and methods for accessing the memory circuits

#25 | 2013-08-22
US20130215695A1
Physics

Self-repairing memory

#26 | 2013-08-15
US20130212449A1
Physics

Self-repairing memory

#27 | 2013-01-17
US20130016576A1
Physics

Time division multiplexing sense amplifier

InventorID:

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