Inventor profile of:

Hung-Wei Chen

City:

Hsinchu

Country:

Taiwan

Published Applications:

18

Last publication date:

2009-05-07

Top Assignees for applications by Hung-Wei Chen

The entities that hold a legal rights for patent applications filed by inventor Chen Hung-Wei:

Recent patent applications by Chen Hung-Wei

Hung-Wei Chen from Hsinchu, TW has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2009-05-07
US20090117695A1
Electricity

BiCMOS performance enhancement by mechanical uniaxial strain and methods of manufacture

#2 | 2008-09-18
US20080224227A1
Electricity

BiCMOS performance enhancement by mechanical uniaxial strain and methods of manufacture

#3 | 2008-09-18
US20080224225A1
Electricity

MOS transistors with selectively strained channels

#4 | 2008-06-19
US20080145984A1
Electricity

Dual metal silicides for lowering contact resistance

#5 | 2007-11-29
US20070272954A1
Electricity

FIN-FET device structure formed employing bulk semiconductor substrate

#6 | 2007-11-22
US20070267694A1
Electricity

Transistors with stressed channels

#7 | 2007-09-20
US20070215936A1
Electricity

Diffusion topography engineering for high performance CMOS fabrication

#8 | 2007-03-08
US20070052027A1
Electricity

Hybrid Schottky source-drain CMOS for high mobility and low barrier

#9 | 2007-02-01
US20070026629A1
Electricity

Structure for a multiple-gate FET device and a method for its fabrication

#10 | 2006-12-14
US20060278915A1
Electricity

FinFET split gate EEPROM structure and method of its fabrication

#11 | 2006-06-15
US20060125121A1
Electricity

Capacitor-less 1T-DRAM cell with Schottky source and drain

#12 | 2006-05-11
US20060097316A1
Electricity

Semiconductor structure and method for integrating SOI devices and bulk devices

#13 | 2006-05-04
US20060091490A1
Electricity

Self-aligned gated p-i-n diode for ultra-fast switching

#14 | 2006-04-27
US20060086987A1
Electricity

Method for manufacturing a semiconductor device with reduced floating body effect

#15 | 2006-03-09
US20060049460A1
Electricity

CMOS logic gate fabricated on hybrid crystal orientations and method of forming thereof

#16 | 2005-12-15
US20050275010A1
Electricity

Semiconductor nano-wire devices and methods of fabrication

#17 | 2005-09-29
US20050215017A1
Electricity

Method for reducing a short channel effect for NMOS devices in SOI circuits

#18 | 2005-05-05
US20050093105A1
Electricity

Semiconductor-on-insulator chip with<100>-oriented transistors

InventorID:

3940223 ⎘