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Inventor profile of:

Hirokuni Yano

City:

Tokyo

Country:

Japan

Published Applications:

61

Last publication date:

2025-04-24

Top Assignees for applications by Hirokuni Yano

The entities that hold a legal rights for patent applications filed by inventor Yano Hirokuni:

Kabushiki Kaisha Toshiba 40 Tokyo, Japan
Kabushiki Kaisha Toshiba 10 Minato-ku, Japan
Toshiba Memory Corporation 6 Minato-ku, Japan
Kioxia Corporation 3 Minato-ku, Japan
KIOXIA CORPORATION 3 Tokyo, Japan
Kabushiki Kaisha Toshiba 2 Kawasaki-shi, Japan
KABUSHIKI KAISHA TOSHIBA 1 Kawasaki, Japan
Kabushiiki Kaisha Toshiba 1 Tokyo, Japan
KABUSHIKI KAISHA TOSHIBA 1 Minatu-ku, Japan

Recent patent applications by Yano Hirokuni

Hirokuni Yano from Tokyo, JP has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-04-24

US20250130713A1

MEMORY SYSTEM AND CONTROL METHOD THEREOF

#2 | 2024-04-04

US20240111416A1

Memory system and control method thereof

#3 | 2023-02-09

US20230042619A1

Semiconductor storage device with volatile and nonvolatile memories to allocate blocks to a memory and release allocated blocks

#4 | 2022-05-19

US20220155960A1

Memory system and control method thereof

#5 | 2021-02-11

US20210042034A1

Semiconductor storage device with volatile and nonvolatile memories to allocate blocks to a memory and release allocated blocks

#6 | 2020-04-30

US20200133496A1

Memory system and control method thereof

#7 | 2019-07-18

US20190220197A1

Semiconductor storage device with volatile and nonvolatile memories to allocate blocks to a memory and release allocated blocks

#8 | 2018-06-14

US20180165011A1

Memory system and control method thereof

#9 | 2017-09-21

US20170269843A1

Semiconductor storage device with volatile and nonvolatile memories to allocate blocks to a memory and release allocated blocks

#10 | 2017-01-12

US20170010818A1

Memory system and control method thereof

#11 | 2016-02-11

US20160041767A1

Memory system and control method thereof

#12 | 2015-12-03

US20150347020A1

Semiconductor storage device with volatile and nonvolatile memories to allocate blocks to a memory and release allocated blocks

#13 | 2015-07-30

US20150212746A1

Memory system and control method thereof

#14 | 2014-11-27

US20140351497A1

Memory system and control method thereof

#15 | 2014-10-09

US20140304567A1

Method of controlling a semiconductor storage device

#16 | 2014-09-11

US20140258602A1

Semiconductor storage device with volatile and nonvolatile memories to allocate blocks to a memory and release allocated blocks

#17 | 2014-08-28

US20140244903A1

Controller, semiconductor storage device and method of controlling data writing

#18 | 2014-02-06

US20140040664A1

Method of controlling a semiconductor storage device

#19 | 2013-10-17

US20130275650A1

SEMICONDUCTOR STORAGE DEVICE

#20 | 2013-09-05

US20130232296A1

Memory system and control method of memory system

#21 | 2013-08-29

US20130227246A1

Management information generating method, logical block constructing method, and semiconductor memory device

#22 | 2013-08-15

US20130212319A1

MEMORY SYSTEM AND METHOD OF CONTROLLING MEMORY SYSTEM

#23 | 2012-12-06

US20120311245A1

Semiconductor storage device with volatile and nonvolatile memories to allocate blocks to a memory and release allocated blocks

#24 | 2012-09-20

US20120239992A1

Method of controlling a semiconductor storage device

#25 | 2012-08-30

US20120221776A1

Semiconductor storage device

#26 | 2012-06-21

US20120159244A1

Memory system

#27 | 2012-06-21

US20120159058A1

Memory system and method for writing data into memory system

#28 | 2012-06-21

US20120159050A1

MEMORY SYSTEM AND DATA TRANSFER METHOD

#29 | 2012-06-21

US20120159046A1

Memory system

#30 | 2012-02-09

US20120033496A1

SEMICONDUCTOR STORAGE DEVICE WITH VOLATILE AND NONVOLATILE MEMORIES

#31 | 2012-02-02

US20120030528A1

Semiconductor storage device

#32 | 2011-12-22

US20110314204A1

Semiconductor storage device, with organizing-state notify processing

#33 | 2011-09-29

US20110238899A1

Memory system, method of controlling memory system, and information processing apparatus

#34 | 2011-09-22

US20110231610A1

Memory system comprising blocks operable in parallel

#35 | 2011-09-08

US20110219177A1

MEMORY SYSTEM AND CONTROL METHOD THEREOF

#36 | 2011-07-14

US20110173380A1

Memory system and method of controlling memory system

#37 | 2010-12-09

US20100313084A1

Semiconductor storage device

#38 | 2010-09-02

US20100223424A1

Memory system and control method thereof

#39 | 2010-07-01

US20100169553A1

Memory system, controller, and method of controlling memory system

#40 | 2010-07-01

US20100169551A1

Memory system managing address translation table and method of controlling thereof

#41 | 2010-07-01

US20100169549A1

Memory system with read and write caches and method of controlling memory system with read and write caches

#42 | 2010-06-24

US20100161885A1

SEMICONDUCTOR STORAGE DEVICE AND STORAGE CONTROLLING METHOD

#43 | 2010-06-10

US20100146228A1

Memory system and control method thereof

#44 | 2010-03-25

US20100077266A1

Memory system and control method thereof

#45 | 2010-02-25

US20100049907A1

Memory system and control method thereof

#46 | 2010-02-11

US20100037012A1

Semiconductor storage device with volatile and nonvolatile memories, method of controlling the same, controller and information processing apparatus

#47 | 2010-02-11

US20100037011A1

Semiconductor device having a volatile semiconductor memory and a nonvolatile semiconductor memory which performs read/write using different size data units

#48 | 2010-02-11

US20100037010A1

Semiconductor storage device with nonvolatile and volatile memories, method of controlling the same, controller and information processing apparatus

#49 | 2010-02-11

US20100037009A1

Semiconductor storage device with volatile and nonvolatile memories

#50 | 2010-02-02

US10808470

Scheduling system and method in which threads for performing a real-time operation are assigned to a plurality of processors

#51 | 2009-08-25

US10779631

Hierarchical storage scheme and data playback scheme for enabling random access to realtime stream data

#52 | 2009-02-12

US20090044188A1

Method and system for performing real-time operation

#53 | 2008-11-13

US20080282249A1

Method and system for performing real-time operation

#54 | 2008-08-26

US10808280

Method and system for performing real-time operation

#55 | 2008-03-27

US20080077706A1

Process migration method computer and system

#56 | 2007-12-25

US10640330

Process migration method computer and system

#57 | 2006-07-04

US9532535

Scheme for systemically registering meta-data with respect to various types of data

#58 | 2005-07-07

US20050149572A1

Scheme for systematically registering meta-data with respect to various types of data

#59 | 2005-05-19

US20050108715A1

Method and system for performing real-time operation

#60 | 2005-03-24

US20050066330A1

Method and system for performing real-time operation

#61 | 2005-03-17

US20050060709A1

Method and system for performing real-time operation including plural chained tasks using plural processors

InventorID:

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