Mississauga
Canada
40
2020-07-16
The entities that hold a legal rights for patent applications filed by inventor Singh Deshanand:
Deshanand Singh from Mississauga, CA has applied for patents for these inventions. The list has both pending applications and granted patents:
Method and apparatus for implementing configurable streaming networks
#2 | 2020-04-07Method and apparatus for implementing configurable streaming networks
#3 | 2020-03-24M/A for compiling parallel program having barrier synchronization for programmable hardware
#4 | 2019-03-05Method and apparatus for implementing configurable streaming networks
#5 | 2018-03-20Method and apparatus for satisfying operating conditions in a system design using an electronic design automation tool
#6 | 2018-02-13Method and apparatus for optimizing implementation of a soft processor executing a fixed program on a target device
#7 | 2017-03-07Method and apparatus for performing multiple stage physical synthesis
#8 | 2017-01-17Multiple alternate configurations for an integrated circuit device
#9 | 2016-12-06Method and apparatus for implementing configurable streaming networks
#10 | 2016-12-01Configuring a programmable device using high-level language
#11 | 2015-09-29Method and apparatus for performing fast incremental resynthesis
#12 | 2015-04-30Configuring a programmable device using high-level language
#13 | 2014-12-23M/A for performing automatic latency optimization on system designs for implementation on programmable hardware
#14 | 2014-10-07Method and apparatus for performing multiple stage physical synthesis
#15 | 2014-08-12Efficient configuration of an integrated circuit device using high-level language
#16 | 2014-05-20Method and apparatus for performing fast incremental resynthesis
#17 | 2013-08-15CONFIGURING A PROGRAMMABLE DEVICE USING HIGH-LEVEL LANGUAGE
#18 | 2013-08-15Configuring a programmable device using high-level language
#19 | 2013-08-13Method and apparatus for performing multiple stage physical synthesis
#20 | 2013-07-30Methods and systems for measuring and presenting performance data of a memory controller system
#21 | 2013-07-09Method and apparatus for performing fast incremental resynthesis
#22 | 2012-10-23Method and apparatus for performing fast incremental resynthesis
#23 | 2012-10-23Method and apparatus for performing simultaneous register retiming and combinational resynthesis during physical synthesis
#24 | 2012-07-03Hardware and software debugging
#25 | 2012-01-10Methods for instruction trace decomposition
#26 | 2011-10-04Method and apparatus for performing incremental placement on a structured application specific integrated circuit
#27 | 2011-08-09Method and apparatus for performing multiple stage physical synthesis
#28 | 2010-09-14Systems and methods for mapping arbitrary logic functions into synchronous embedded memories
#29 | 2009-11-17Method and apparatus for performing post-placement routability optimization
#30 | 2009-09-22Method and apparatus for performing layout-driven optimizations on field programmable gate arrays
#31 | 2009-03-24Method and apparatus for performing post-placement functional decomposition on field programmable gate arrays using binary decision diagrams
#32 | 2009-03-03Method and apparatus for performing physical synthesis hill-climbing on multi-processor machines
#33 | 2008-12-09Programmable logic devices with skewed clocking signals
#34 | 2008-10-28Systems and methods for mapping arbitrary logic functions into synchronous embedded memories
#35 | 2008-08-12Detecting reducible registers
#36 | 2008-07-15Method and apparatus for performing compound duplication of components on field programmable gate arrays
#37 | 2007-10-30Leveraging combinations of synthesis, placement and incremental optimizations
#38 | 2007-08-07Synthesis aware placement: a novel approach that combines knowledge of possible resynthesis
#39 | 2007-03-13Method and apparatus for performing incremental compilation on field programmable gate arrays
#40 | 2006-09-12Programmable logic devices with skewed clocking signals
394221 ⎘