Inventor profile of:

Jonghee HAN

City:

Cary, North Carolina

Country:

United States

Published Applications:

23

Last publication date:

2009-05-14

Top Assignees for applications by Jonghee HAN

The entities that hold a legal rights for patent applications filed by inventor HAN Jonghee:

Recent patent applications by HAN Jonghee

Jonghee HAN from Cary, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2009-05-14
US20090122856A1
Physics

METHOD AND APPARATUS FOR ENCODING DATA

#2 | 2007-10-25
US20070247960A1
Physics

System and method to synchronize signals in individual integrated circuit components

#3 | 2007-10-18
US20070241799A1
Electricity

Duty cycle corrector

#4 | 2007-05-10
US20070103216A1
Electricity

Duty cycle corrector

#5 | 2006-10-17
US11128688
-

Input circuit having updated output signal synchronized to clock signal

#6 | 2006-09-28
US20060214714A1
Physics

Duty cycle corrector

#7 | 2006-09-14
US20060203575A1
Physics

Memory with data latching circuit including a selector

#8 | 2006-07-27
US20060168470A1
Physics

Random access memory with post-amble data strobe signal noise rejection

#9 | 2006-07-13
US20060152266A1
Physics

Duty cycle detector with first, second, and third values

#10 | 2006-07-13
US20060152265A1
Physics

Duty cycle corrector

#11 | 2005-12-22
US20050281074A1
Physics

Input return path based on V/V

#12 | 2005-06-23
US20050134331A1
Electricity

Input buffer circuit including reference voltage monitoring circuit

#13 | 2005-05-26
US20050111274A1
Physics

Dual power sensing scheme for a memory device

#14 | 2005-05-19
US20050104618A1
Electricity

Low rise/fall skewed input buffer compensating process variation

#15 | 2005-05-10
US10744804
-

Input buffer with differential amplifier

#16 | 2005-05-05
US20050097291A1
Physics

Multiple data rate bus using return clock

#17 | 2005-05-05
US20050093594A1
Electricity

DELAY LOCKED LOOP PHASE BLENDER CIRCUIT

#18 | 2005-04-21
US20050083766A1
Physics

Random access memory having self-adjusting off-chip driver

#19 | 2005-04-14
US20050078530A1
Physics

Method and circuit configuration for digitizing a signal in an input buffer of a DRAM device

#20 | 2005-04-07
US20050073901A1
Physics

Random access memory with data strobe locking circuit

#21 | 2005-03-31
US20050068810A1
Physics

Random access memory with post-amble data strobe signal noise rejection

#22 | 2005-01-25
US10692119
-

Method and circuit configuration for multiple charge recycling during refresh operations in a DRAM device

#23 | 2005-01-04
US10706146
-

Latch scheme with invalid command detector

InventorID:

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