Austin, Texas
United States
33
2016-05-05
The entities that hold a legal rights for patent applications filed by inventor Koka Pranay:
Pranay Koka from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Method and system for dynamic cache partitioning using address remapping
#2 | 2016-03-03System and method for performing message driven prefetching at the network interface
#3 | 2016-02-11Data deduplication at the network interfaces
#4 | 2015-10-22Using broadcast-based TLB sharing to reduce address-translation latency in a shared-memory system with optical interconnect
#5 | 2015-03-12Reconfigurable optical interconnect network
#6 | 2014-09-18Prediction-based switch allocator
#7 | 2014-05-15Opportunistic bandwidth stealing in optical networks
#8 | 2014-05-01Accessing an off-chip cache via silicon photonic waveguides
#9 | 2014-05-01SINGLE-LAYER OPTICAL POINT-TO-POINT NETWORK
#10 | 2014-03-27Distributed page-table lookups in a shared-memory system
#11 | 2014-02-20Using a shared last-level TLB to reduce address-translation latency
#12 | 2014-02-06Using broadcast-based TLB sharing to reduce address-translation latency in a shared-memory system with electrical interconnect
#13 | 2014-01-09Combining a remote TLB lookup and a subsequent cache miss into a single coherence operation
#14 | 2013-11-21Butterfly optical network with crossing-free switches
#15 | 2013-06-06Processor-bus-connected flash storage paging device using a virtual memory mapping table and page faults
#16 | 2013-01-17Optical network with tunable optical light sources
#17 | 2013-01-17Optical network with switchable drop filters
#18 | 2013-01-17Arbitrated optical network using tunable drop filters
#19 | 2012-05-03Executing flash storage access requests
#20 | 2011-08-18Data channel organization for a switched arbitrated on-chip optical network
#21 | 2011-08-18Shared-source-row optical data channel organization for a switched arbitrated on-chip optical network
#22 | 2011-07-21Time division multiplexing based arbitration for shared optical links
#23 | 2011-05-05Two-phase arbitration mechanism for shared optical links
#24 | 2011-04-21Processor-bus attached flash main-memory module
#25 | 2011-04-07Processor-bus-connected flash storage nodes with caching to support concurrent DMA accesses from multiple processors
#26 | 2010-10-26Hardware data race detection in HPCS codes
#27 | 2010-10-21Data transmission using direct and indirect optical paths
#28 | 2010-01-21Transactional memory support for non-coherent shared memory systems using selective write through caches
#29 | 2010-01-21Collision detection scheme for optical interconnects
#30 | 2010-01-21Arbitration scheme for an optical bus
#31 | 2009-04-02Hybrid cache coherence using fine-grained hardware message passing
#32 | 2009-04-02Direct messaging in distributed memory systems
#33 | 2008-10-02Reduction of cache flush time using a dirty line limiter
39656 ⎘