Tokyo
Japan
10
2013-08-22
The entities that hold a legal rights for patent applications filed by inventor UCHIDA Kohei:
Kohei UCHIDA from Tokyo, JP has applied for patents for these inventions. The list has both pending applications and granted patents:
DETERIORATION DETECTION CIRCUIT, SEMICONDUCTOR INTEGRATED DEVICE, AND DETERIORATION DETECTION METHOD
#2 | 2010-03-11Capacitor arrangement method and layout apparatus
#3 | 2009-07-30Apparatus and circuit including latch circuit, and method of controlling latch circuit
#4 | 2009-05-28Power control system, power control apparatus, power control method and storage medium
#5 | 2009-03-12Apparatus and method for generating clock signal
#6 | 2008-08-07SYSTEM FOR PLACING ELEMENTS OF SEMICONDUCTOR INTEGRATED CIRCUIT, METHOD OF PLACING ELEMENTS THEREON, AND PROGRAM FOR PLACING ELEMENTS
#7 | 2007-09-27Electronic circuit and integrated circuit including scan testing circuit, and power consumption reducing method used for integrated circuit
#8 | 2006-10-19Method of designing layout of semiconductor integrated circuit and apparatus for doing the same
#9 | 2006-09-21Method of designing layout of semiconductor integrated circuit and apparatus for doing the same
#10 | 2006-01-19System for placing elements of semiconductor integrated circuit, method of placing elements thereon, and program for placing elements
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