Inventor profile of:

Dmytro Chumakov

City:

Dresden

Country:

Germany

Published Applications:

21

Last publication date:

2014-10-09

Top Assignees for applications by Dmytro Chumakov

The entities that hold a legal rights for patent applications filed by inventor Chumakov Dmytro:

Recent patent applications by Chumakov Dmytro

Dmytro Chumakov from Dresden, DE has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2014-10-09
US20140299929A1
Electricity

DRAM cell based on conductive nanochannel plate

#2 | 2013-01-03
US20130001654A1
Electricity

Mask-based silicidation for FEOL defectivity reduction and yield boost

#3 | 2012-11-08
US20120282712A1
Electricity

DOPANT MARKER FOR PRECISE RECESS CONTROL

#4 | 2012-10-25
US20120270342A1
Physics

In-situ measurement of feature dimensions

#5 | 2012-10-25
US20120267763A1
Electricity

Integrated circuits having place-efficient capacitors and methods for fabricating the same

#6 | 2012-09-27
US20120244710A1
Electricity

Shrinkage of critical dimensions in a semiconductor device by selective growth of a mask material

#7 | 2012-09-06
US20120225503A1
Electricity

Dopant marker for precise recess control

#8 | 2012-08-09
US20120199950A1
Electricity

Integrated circuits having place-efficient capacitors and methods for fabricating the same

#9 | 2012-08-02
US20120193807A1
Electricity

DRAM cell based on conductive nanochannel plate

#10 | 2012-06-28
US20120164836A1
Electricity

Integrated circuit fabrication methods utilizing embedded hardmask layers for high resolution patterning

#11 | 2012-06-28
US20120161327A1
Electricity

Shrinkage of contact elements and vias in a semiconductor device by incorporating additional tapering material

#12 | 2012-05-17
US20120122249A1
Electricity

Dopant marker for precise recess control

#13 | 2012-03-01
US20120052601A1
Physics

Method and system for extracting samples after patterning of microstructure devices

#14 | 2012-02-02
US20120025862A1
Electricity

Test structure for ILD void testing and contact resistance measurement in a semiconductor device

#15 | 2011-12-01
US20110291299A1
Electricity

Stress reduction in chip packaging by a stress compensation region formed around the chip

#16 | 2011-12-01
US20110291298A1
Electricity

Chip package including multiple sections for reducing chip package interaction

#17 | 2011-12-01
US20110291170A1
Electricity

Semiconductor device comprising a buried capacitor formed in the contact level

#18 | 2011-11-03
US20110266685A1
Electricity

Semiconductor Device Comprising Sophisticated Conductive Elements in a Dielectric Material System Formed by Using a Barrier Layer

#19 | 2011-10-06
US20110241166A1
Electricity

Semiconductor device comprising a capacitor formed in the contact level

#20 | 2010-09-30
US20100242631A1
Physics

Method and system for particles analysis in microstructure devices by isolating particles

#21 | 2007-03-01
US20070044544A1
Physics

Method and apparatus for determining surface characteristics by using SPM techniques with acoustic excitation and real-time digitizing

InventorID:

4012 ⎘