Inventor profile of:

Bruce Pedersen

City:

San Jose, California

Country:

United States

Published Applications:

26

Last publication date:

2019-01-08

Top Assignees for applications by Bruce Pedersen

The entities that hold a legal rights for patent applications filed by inventor Pedersen Bruce:

Recent patent applications by Pedersen Bruce

Bruce Pedersen from San Jose, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2019-01-08
US15351167
Electricity

Omnibus logic element

#2 | 2016-11-15
US14501834
Electricity

Omnibus logic element

#3 | 2016-03-29
US13620338
Physics

Method and apparatus for utilizing patterns in data to reduce file size

#4 | 2014-11-04
US14062637
Electricity

Omnibus logic element

#5 | 2013-01-15
US10316371
-

Method and apparatus for utilizing patterns in data to reduce file size

#6 | 2011-03-22
US12425342
-

Omnibus logic element for packing or fracturing

#7 | 2010-09-21
US11841727
-

Fracturable lookup table and logic element

#8 | 2010-03-02
US12202053
-

Versatile logic element and logic array block

#9 | 2009-11-26
US20090289660A1
Physics

Interconnection and input/output resources for programmable logic integrated circuit devices

#10 | 2008-03-27
US20080074143A1
Physics

Interconnection and input/output resources for programmable logic integrated circuit devices

#11 | 2007-11-01
US20070252617A1
Electricity

Versatile logic element and logic array block

#12 | 2007-09-27
US20070222477A1
Electricity

Fracturable lookup table and logic element

#13 | 2007-08-07
US10305886
-

Multiplexing device including a hardwired multiplexer in a programmable logic device

#14 | 2007-04-12
US20070080710A1
Physics

Interconnection resources for programmable logic integrated circuit devices

#15 | 2007-02-08
US20070030029A1
Physics

Interconnection and input/output resources for programmable logic integrated circuit devices

#16 | 2006-08-29
US10745913
-

Technology mapping technique for fracturable logic elements

#17 | 2006-02-07
US10668447
-

Hybrid phase/delay locked loop circuits and methods

#18 | 2006-01-24
US10852858
-

Interconnection and input/output resources for programmable logic integrated circuit devices

#19 | 2005-12-13
US10426473
-

Reduced power consumption clock network

#20 | 2005-10-06
US20050218930A1
Physics

Interconnection resources for programmable logic integrated circuit devices

#21 | 2005-09-13
US10364310
-

Fracturable lookup table and logic element

#22 | 2005-08-30
US10280723
-

Versatile logic element and logic array block

#23 | 2005-05-24
US10797484
-

Interconnection resources for programmable logic integrated circuit devices

#24 | 2005-05-17
US10458431
-

Interconnection and input/output resources for programmable logic integrated circuit devices

#25 | 2005-05-03
US10365647
-

Fracturable incomplete look up table for area efficient logic elements

#26 | 2005-03-29
US10640712
-

Automated implementation of non-arithmetic operators in an arithmetic logic cell

InventorID:

4064809 ⎘