Xiangdong Chen

Standard cell architecture with M1 layer unidirectional routing

MASK ASSIGNMENT TECHNIQUE FOR M1 METAL LAYER IN TRIPLE-PATTERNING LITHOGRAPHY

Variable interconnect pitch for improved performance

High performance standard cell with continuous oxide definition and characterized leakage current

Grounding dummy gate in scaled layout design

Digital circuit design with semi-continuous diffusion standard cell

Conductive layer routing

SCALABLE INTEGRATED MIM CAPACITOR USING GATE METAL

Metal-insulator-metal (MIM) capacitor

Stacked packaging using reconstituted wafers

FinFET based one-time programmable device

Method of fabricating a flash memory comprising a high-K dielectric and a metal gate

Decoupling composite capacitor in a semiconductor wafer

One-time programmable device

LDMOS one-time programmable device

Zener diode structure and process

Semiconductor package with integrated selectively conductive film interposer

Semiconductor packages with integrated heat spreaders

System-in-package with integrated socket

Semiconductor package with integrated electromagnetic shielding

Semiconductor package with improved testability

Semiconductor package having an interposer configured for magnetic signaling

Structure and method for making low leakage and low mismatch NMOSFET

Semiconductor interposer having a cavity for intra-interposer die

Semiconductor package with ultra-thin interposer without through-semiconductor vias

Semiconductor package with a bridge interposer

Programmable interposer with conductive particles

Stacked Packaging Using Reconstituted Wafers

FinFET devices

Fin-based adjustable resistor

MOM capacitor having local interconnect metal plates and related method

MIM capacitor having a local interconnect metal electrode and related structure

One time programmable structure using a gate last high-K metal gate process

Zener diode structure and process

One-time programmable device having an LDMOS structure

Fin-based bipolar junction transistor and method for fabrication

Half-FinFET semiconductor device and related method

FinFET based one-time programmable device and related method

Method for fabricating a MOS transistor with reduced channel length variation

Method for efficiently fabricating memory cells with logic FETs and related structure

Transistor with reduced channel length variation

Combined Substrate High-K Metal Gate Device and Oxide-Polysilicon Gate Device, and Process of Fabricating Same

Programmable fuse

One-time programmable memory cell

Programmable memory cell with shiftable threshold voltage transistor

One-time programmable semiconductor device

Integrated native device without a halo implanted channel region and method for its fabrication

Scalable integrated MIM capacitor using gate metal

Integrated resistor using gate metal for a resistive element

Low mismatch semiconductor device and method for fabricating same

Semiconductor device having a lightly doped semiconductor gate and method for fabricating same

Structure and method for making low leakage and low mismatch NMOSFET

Method for fabricating a flash memory cell utilizing a high-K metal gate process and related structure

Method for fabricating a MOS transistor with reduced channel length variation and related structure

Interposer structure with passive component and method for fabricating same

Method for fabricating a MOS transistor with source/well heterojunction and related structure

Method for fabricating a decoupling composite capacitor in a wafer and related structure

One-time programmable memory cell with shiftable threshold voltage transistor

Method for fabricating a MIM capacitor using gate metal for electrode and related structure

Method for forming a one-time programmable metal fuse and related structure

Method for selective gate halo implantation in a semiconductor die and related structure

One-time programmable memory cell