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Inventor profile of:

Kiyoshi Takeuchi

City:

Tokyo

Country:

Japan

Published Applications:

Last publication date:

2024-03-21

Top Assignees for applications by Kiyoshi Takeuchi

The entities that hold a legal rights for patent applications filed by inventor Takeuchi Kiyoshi:

NEC Corporation 10 Tokyo, Japan
Dai Nippon Printing Co., Ltd. 5 Tokyo, Japan
RENESAS ELECTRONICS CORPORATION 2 Tokyo, Japan
TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 1 Tokyo, Japan
RENESAS ELECTRONICS CORPORATION 1 Kawasaki-shi, Kanagawa, Japan
The University of Tokyo 1 Tokyo, Japan
MITSUBISHI ELECTRIC CORPORATION 1 TOKYO, Japan
NEC Corporation 1 Minato-ku, Japan

Recent patent applications by Takeuchi Kiyoshi

Kiyoshi Takeuchi from Tokyo, JP has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2024-03-21

US20240097013A1

Electricity

SEMICONDUCTOR DEVICE

#2 | 2016-09-15

US20160267975A1

Physics

SEMICONDUCTOR MEMORY

#3 | 2016-05-19

US20160141030A1

Physics

Semiconductor memory device including rewriting operation for improving the long-term reliability of the resistance variable element

#4 | 2016-03-24

US20160086939A1

Electricity

SEMICONDUCTOR DEVICE

#5 | 2016-02-25

US20160056145A1

Electricity

High-electron-mobility transistor with protective diode

#6 | 2013-08-29

US20130220686A1

Electricity

Multilayered printed wiring board

#7 | 2011-03-17

US20110061903A1

Electricity

Multilayered printed wiring board and method for manufacturing the same

#8 | 2011-03-10

US20110059584A1

Electricity

Manufacturing process of fin-type field effect transistor and semiconductor

#9 | 2011-02-03

US20110024828A1

Electricity

Semiconductor storage device

#10 | 2011-01-27

US20110018056A1

Electricity

Semiconductor device and method for manufacturing the same

#11 | 2010-08-26

US20100217568A1

Physics

VARIATION SIMULATION SYSTEM, METHOD FOR DETERMINING VARIATIONS, APPARATUS FOR DETERMINING VARIATIONS AND PROGRAM

#12 | 2010-03-25

US20100076741A1

Physics

SYSTEM, METHOD AND PROGRAM FOR DETERMINING WORST CONDITION OF CIRCUIT OPERATION

#13 | 2009-12-31

US20090321849A1

Electricity

SEMICONDUCTOR DEVICE, INTEGRATED CIRCUIT, AND SEMICONDUCTOR MANUFACTURING METHOD

#14 | 2009-05-28

US20090134454A1

Electricity

Fin-type field effect transistor and semiconductor device

#15 | 2009-01-15

US20090014795A1

Electricity

Substrate for field effect transistor, field effect transistor and method for production thereof

#16 | 2009-01-15

US20090014205A1

Electricity

Printed circuit board assembled panel, unit sheet for packaging a printed circuit board, rigid-flexible board and method for manufacturing the same

#17 | 2008-10-16

US20080251849A1

Electricity

Semiconductor device and method for manufacturing same

#18 | 2008-04-03

US20080079077A1

Electricity

Semiconductor device and manufacturing method thereof

#19 | 2008-02-28

US20080049405A1

Electricity

Multilayered printed wiring board

#20 | 2008-02-28

US20080047737A1

Electricity

Multilayered printed wiring board and method for manufacturing the same

#21 | 2008-02-07

US20080029821A1

Electricity

Semiconductor device with fin-type field effect transistor and manufacturing method thereof.

#22 | 2007-12-06

US20070281505A1

Electricity

Rigid-flexible board and method for manufacturing the same

#23 | 2007-08-23

US20070198235A1

Physics

Variation simulation system

#24 | 2007-07-12

US20070158700A1

Electricity

Field effect transistor and method for producing the same

#25 | 2007-06-14

US20070132009A1

Electricity

Semiconductor device having a conductive portion below an interlayer insulating film and method for producing the same

#26 | 2007-04-05

US20070075372A1

Electricity

Semiconductor device and manufacturing process therefor

InventorID:

408576 ⎘