Inventor profile of:

Katherina E. Babich

City:

Chappaqua, New York

Country:

United States

Published Applications:

28

Last publication date:

2015-01-01

Top Assignees for applications by Katherina E. Babich

The entities that hold a legal rights for patent applications filed by inventor Babich Katherina E.:

Recent patent applications by Babich Katherina E.

Katherina E. Babich from Chappaqua, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2015-01-01
US20150004802A1
Electricity

Methods and structures for protecting one area while processing another area on a chip

#2 | 2013-01-17
US20130017486A1
Physics

Process of making a lithographic structure using antireflective materials

#3 | 2012-11-29
US20120299101A1
Electricity

THIN BODY SILICON-ON-INSULATOR TRANSISTOR WITH BORDERLESS SELF-ALIGNED CONTACTS

#4 | 2012-11-22
US20120295417A1
Electricity

SELECTIVE EPITAXIAL GROWTH BY INCUBATION TIME ENGINEERING

#5 | 2012-08-30
US20120217590A1
Electricity

Filling narrow openings using ion beam etch

#6 | 2011-10-20
US20110254138A1
Electricity

LOW-TEMPERATURE ABSORBER FILM AND METHOD OF FABRICATION

#7 | 2011-03-03
US20110048930A1
Electricity

Selective nanotube growth inside vias using an ion beam

#8 | 2010-02-18
US20100038723A1
Electricity

Self-aligned borderless contacts for high density electronic and memory device integration

#9 | 2010-02-18
US20100038715A1
Electricity

THIN BODY SILICON-ON-INSULATOR TRANSISTOR WITH BORDERLESS SELF-ALIGNED CONTACTS

#10 | 2009-03-05
US20090061355A1
Physics

Process of making a lithographic structure using antireflective materials

#11 | 2008-12-18
US20080311508A1
Physics

Process of making a semiconductor device using multiple antireflective materials

#12 | 2008-08-07
US20080187731A1
Electricity

Techniques for Patterning Features in Semiconductor Devices

#13 | 2008-06-26
US20080153270A1
Electricity

Method for tuning epitaxial growth by interfacial doping and structure including same

#14 | 2008-05-29
US20080124650A1
Physics

Multilayered resist systems using tuned polymer films as underlayers and methods of fabrication thereof

#15 | 2008-05-29
US20080124649A1
Physics

Multilayered resist systems using tuned polymer films as underlayers and methods of fabrication thereof

#16 | 2008-04-24
US20080093640A1
Electricity

METHOD FOR TUNING EPITAXIAL GROWTH BY INTERFACIAL DOPING AND STRUCTURE INCLUDING SAME

#17 | 2008-04-22
US9256034
-

Multilayered resist systems using tuned polymer films as underlayers and methods of fabrication thereof

#18 | 2007-08-23
US20070196748A1
Physics

Process of making a semiconductor device using multiple antireflective materials

#19 | 2007-05-10
US20070105363A1
Physics

Antireflective hardmask and uses thereof

#20 | 2007-04-26
US20070090487A1
Electricity

Method for tuning epitaxial growth by interfacial doping and structure including same

#21 | 2007-01-18
US20070015083A1
Physics

Antireflective composition and process of making a lithographic structure

#22 | 2007-01-18
US20070015082A1
Physics

Process of making a lithographic structure using antireflective materials

#23 | 2006-06-08
US20060118785A1
Electricity

Techniques for patterning features in semiconductor devices

#24 | 2005-05-12
US20050098091A1
Electricity

Etch selectivity enhancement for tunable etch resistant anti-reflective layer

#25 | 2005-03-24
US20050064322A1
Physics

Water and aqueous base soluble antireflective coating/hardmask materials

#26 | 2005-03-17
US20050056823A1
Electricity

Techniques for patterning features in semiconductor devices

#27 | 2005-02-22
US10657665
-

Attenuated embedded phase shift photomask blanks

#28 | 2005-02-17
US20050037604A1
Electricity

Multilayer interconnect structure containing air gaps and method for making

InventorID:

40986 ⎘