Austin, Texas
United States
30
2008-10-30
The entities that hold a legal rights for patent applications filed by inventor FIELDS JAMES STEPHEN:
JAMES STEPHEN FIELDS from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Recovering from errors in a data processing system
#2 | 2008-10-09Method for indirect access to a support interface for memory-mapped resources to reduce system connectivity from out-of-band support processor
#3 | 2008-08-28Apparatus for operating cache-inhibited memory mapped commands to access registers
#4 | 2008-02-21Victim cache using direct intervention
#5 | 2008-02-14Data processing system and method for efficient communication utilizing an Tn and Ten coherency states
#6 | 2008-01-31Efficient storage of metadata in a system memory
#7 | 2008-01-31Data processing system and method for efficient coherency communication utilizing coherency domain indicators
#8 | 2007-03-29Method and apparatus for automatically identifying multiple combinations of operational and non-operational components on integrated circuit chips with a single part number
#9 | 2007-01-25System and method of responding to a cache read error with a temporary cache directory column delete
#10 | 2006-08-24Method and apparatus for automatic recovery from a failed node concurrent maintenance operation
#11 | 2006-08-17Victim cache using direct intervention
#12 | 2006-08-17Method and apparatus for multiplexing commands in a symmetric multiprocessing system interchip link
#13 | 2006-08-10System and method for recovering from errors in a data processing system
#14 | 2006-08-10Dynamic power management via DIMM read operation limiter
#15 | 2006-08-10Method to operate cache-inhibited memory mapped commands to access registers
#16 | 2006-08-10Data processing system and method for efficient storage of metadata in a system memory
#17 | 2006-08-10Data processing system and method for efficient communication utilizing an Ig coherency state
#18 | 2006-08-10Data processing system and method for efficient coherency communication utilizing coherency domain indicators
#19 | 2006-08-10Data processing system and method for efficient communication utilizing an Tn and Ten coherency states
#20 | 2006-08-10Data processing system and method for efficient coherency communication utilizing coherency domains
#21 | 2006-08-10Half-good mode for large L2 cache array topology with different latency domains
#22 | 2006-08-10L2 cache controller with slice directory and unified cache structure
#23 | 2006-08-10Method to preserve ordering of read and write operations in a DMA system by delaying read access
#24 | 2006-08-10Method for providing low-level hardware access to in-band and out-of-band firmware
#25 | 2006-08-10Method and apparatus for autonomic policy-based thermal management in a data processing system
#26 | 2006-08-10Method for indirect access to a support interface for memory-mapped resources to reduce system connectivity from out-of-band support processor
#27 | 2006-06-08Apparatus and method for accurately tuning the speed of an integrated circuit
#28 | 2006-05-11Method, system, and program for transferring data directed to virtual memory addresses to a device memory
#29 | 2005-03-31Modified-invalid cache state to reduce cache-to-cache data transfer operations for speculatively-issued full cache line writes
#30 | 2005-03-03Method, system and program product providing a configuration specification language that supports the definition of links between configuration constructs
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