Inventor profile of:

Peter Poechmueller

City:

Dresden

Country:

Germany

Published Applications:

16

Last publication date:

2008-02-07

Top Assignees for applications by Peter Poechmueller

The entities that hold a legal rights for patent applications filed by inventor Poechmueller Peter:

Recent patent applications by Poechmueller Peter

Peter Poechmueller from Dresden, DE has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2008-02-07
US20080029884A1
Electricity

MULTICHIP DEVICE AND METHOD FOR PRODUCING A MULTICHIP DEVICE

#2 | 2007-04-26
US20070090500A1
Electricity

Housed DRAM chip for high-speed applications

#3 | 2007-04-19
US20070085192A1
Electricity

Method for producing micromechanical components in integrated circuits and arrangement of a semiconductor on a substrate

#4 | 2006-09-14
US20060203567A1
Physics

Integrated memory circuit and method for repairing a single bit error

#5 | 2006-09-14
US20060203559A1
Physics

Memory device with customizable configuration

#6 | 2006-08-31
US20060193184A1
Physics

Hub module for connecting one or more memory chips

#7 | 2006-08-24
US20060190674A1
Physics

Hub chip for connecting one or more memory chips

#8 | 2006-07-13
US20060152984A1
Physics

Memory component and addressing of memory cells

#9 | 2006-06-22
US20060133159A1
Electricity

Method for transmission and reception of a data signal on a line pair, as well as a transmission and reception circuit for this purpose

#10 | 2006-06-15
US20060126407A1
Physics

Methods for repairing and for operating a memory component

#11 | 2006-04-06
US20060071689A1
Electricity

Circuit and method for generating an output signal

#12 | 2006-03-09
US20060050577A1
Physics

Memory module with programmable fuse element

#13 | 2006-03-09
US20060049515A1
Physics

Memory module having memory chips protected from excessive heat

#14 | 2005-12-22
US20050281076A1
Physics

Memory circuit comprising redundant memory areas

#15 | 2005-12-08
US20050270864A1
Electricity

Memory cell arrangement having dual memory cells

#16 | 2005-09-29
US20050216808A1
Physics

Method and circuit arrangement for testing electrical modules

InventorID:

4110018 ⎘