Inventor profile of:

Bradley S. Nelson

City:

Austin, Texas

Country:

United States

Published Applications:

16

Last publication date:

2008-12-04

Top Assignees for applications by Bradley S. Nelson

The entities that hold a legal rights for patent applications filed by inventor Nelson Bradley S.:

Recent patent applications by Nelson Bradley S.

Bradley S. Nelson from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2008-12-04
US20080301603A1
Physics

Clock-gated model transformation for asynchronous testing of logic targeted for free-running, data-gated logic

#2 | 2008-11-27
US20080295052A1
Physics

Modeling asynchronous behavior from primary inputs and latches

#3 | 2008-10-30
US20080270966A1
Physics

Method and system for unfolding/replicating logic paths to facilitate modeling of metastable value propagation

#4 | 2008-10-16
US20080256135A1
Physics

Program product for providing a configuration specification language supporting incompletely specified configuration entities

#5 | 2008-08-14
US20080192645A1
Physics

Methods and arrangements to model an asynchronous interface

#6 | 2008-03-20
US20080072197A1
Physics

Method for asynchronous clock modeling in an integrated circuit simulation

#7 | 2008-03-20
US20080072188A1
Physics

Method for modeling metastability decay through latches in an integrated circuit model

#8 | 2008-02-14
US20080040695A1
Physics

Accurately modeling an asynchronous interface using expanded logic elements

#9 | 2007-11-22
US20070271542A1
Physics

Method and system for unfolding/replicating logic paths to facilitate modeling of metastable value propagation

#10 | 2007-11-01
US20070253275A1
Physics

Clock-gated model transformation for asynchronous testing of logic targeted for free-running, data-gated logic

#11 | 2007-10-18
US20070244685A1
Physics

METHOD FOR MODELING METASTABILITY DECAY USING FENCE LOGIC INSERTION

#12 | 2007-08-23
US20070198238A1
Physics

Modeling asynchronous behavior from primary inputs and latches

#13 | 2007-05-03
US20070098020A1
Physics

Methods and arrangements to model an asynchronous interface

#14 | 2006-08-24
US20060190883A1
Physics

System and method for unfolding/replicating logic paths to facilitate propagation delay modeling

#15 | 2006-08-24
US20060190858A1
Physics

System and method for accurately modeling an asynchronous interface using expanded logic elements

#16 | 2006-01-05
US20060004556A1
Physics

Method, system and program product for providing a configuration specification language supporting incompletely specified configuration entities

InventorID:

4119136 ⎘