Inventor profile of:

Jean-Philippe Lesot

City:

Etrelles

Country:

France

Published Applications:

29

Last publication date:

2011-10-04

Top Assignees for applications by Jean-Philippe Lesot

The entities that hold a legal rights for patent applications filed by inventor Lesot Jean-Philippe:

Recent patent applications by Lesot Jean-Philippe

Jean-Philippe Lesot from Etrelles, FR has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2011-10-04
US10151282
-

Energy-aware scheduling of application execution

#2 | 2011-05-10
US10003570
-

Data processing apparatus, system and method

#3 | 2009-07-21
US10831387
-

Embedded garbage collection

#4 | 2009-02-24
US10831575
-

Accessing device driver memory in programming language representation

#5 | 2008-06-05
US20080134322A1
Physics

Micro-sequence based security model

#6 | 2008-06-05
US20080134212A1
Physics

Performing java interrupt with two program counters

#7 | 2008-02-12
US10818584
-

Management of stack-based memory usage in a processor

#8 | 2006-02-02
US20060026580A1
Physics

Method and related system of dynamic compiler resolution

#9 | 2006-02-02
US20060026575A1
Physics

Method and system of adaptive dynamic compiler resolution

#10 | 2006-02-02
US20060026574A1
Physics

Method and apparatus for code optimization

#11 | 2006-02-02
US20060026571A1
Physics

Method and system of control flow graph construction

#12 | 2006-02-02
US20060026566A1
Physics

Method and system for thread abstraction

#13 | 2006-02-02
US20060026565A1
Physics

Method and system for implementing an interrupt handler

#14 | 2006-02-02
US20060026412A1
Physics

Removing local RAM size limitations when executing software code

#15 | 2006-02-02
US20060026404A1
Physics

Method and system to construct a data-flow analyzer for a bytecode verifier

#16 | 2006-02-02
US20060026400A1
Physics

Automatic operand load, modify and store

#17 | 2006-02-02
US20060026398A1
Physics

Unpack instruction

#18 | 2006-02-02
US20060026397A1
Physics

Pack instruction

#19 | 2006-02-02
US20060026396A1
Physics

Memory access instruction with optional error check

#20 | 2006-02-02
US20060026392A1
Physics

Method and system of informing a micro-sequence of operand width

#21 | 2006-02-02
US20060026391A1
Physics

Method and system for obtaining an immediate operand of a bytecode for use by a micro-sequence

#22 | 2006-02-02
US20060026370A1
Physics

Method and system for accessing indirect memories

#23 | 2006-02-02
US20060026357A1
Physics

Context save and restore with a stack-based memory structure

#24 | 2006-02-02
US20060026354A1
Physics

Cache memory usable as scratch pad storage

#25 | 2006-02-02
US20060026353A1
Physics

Memory usable in cache mode or scratch pad mode to reduce the frequency of memory accesses

#26 | 2006-02-02
US20060026200A1
Physics

Method and system for shared object data member zones

#27 | 2006-02-02
US20060026183A1
Physics

Method and system provide concurrent access to a software object

#28 | 2006-02-02
US20060025986A1
Physics

Method and system to emulate an M-bit instruction set

#29 | 2005-02-10
US20050033945A1
Physics

Dynamically changing the semantic of an instruction

InventorID:

4190191 ⎘