Heverlee
Belgium
30
2020-04-09
The entities that hold a legal rights for patent applications filed by inventor Dal Mark van:
Mark van Dal from Heverlee, BE has applied for patents for these inventions. The list has both pending applications and granted patents:
Semiconductor device and formation thereof
#2 | 2017-10-26Semiconductor device and formation thereof
#3 | 2017-01-05Semiconductor device and method including an intertial mass element
#4 | 2016-02-25Structure and method for defect passivation to reduce junction leakage for finfet device
#5 | 2016-02-18III-V compound semiconductor device having dopant layer and method of making the same
#6 | 2015-10-15Semiconductor device and formation thereof
#7 | 2015-10-01Semiconductor device and formation thereof
#8 | 2015-06-18Epitaxially Growing III-V Contact Plugs for MOSFETs
#9 | 2014-09-18MOSFETs with channels on nothing and methods for forming the same
#10 | 2014-09-18Ditches near semiconductor fins and methods for forming the same
#11 | 2014-09-18Barrier layer for FinFET channels
#12 | 2014-09-11FinFET with channel backside passivation layer device and method
#13 | 2014-08-28Structure and method for defect passivation to reduce junction leakage for finFET device
#14 | 2014-06-12Faceted finFET
#15 | 2014-05-22Device with a strained Fin
#16 | 2014-03-06Fin field effect transistor layout for stress optimization
#17 | 2013-11-14III-V COMPOUND SEMICONDUCTOR DEVICE HAVING DOPANT LAYER AND METHOD OF MAKING THE SAME
#18 | 2013-10-03MOSFETs with channels on nothing and methods for forming the same
#19 | 2013-10-03FinFET with a buried semiconductor material between two fins
#20 | 2013-09-12Nickelide source/drain structures for CMOS transistors
#21 | 2012-12-20Strained channel field effect transistor
#22 | 2012-12-20Mask-less and implant free formation of complementary tunnel field effect transistors
#23 | 2012-04-12Method of fabricating a semiconductor device having an epitaxy region
#24 | 2011-11-22Method of fabricating a semiconductor device having an epitaxy region
#25 | 2010-02-25SELF-ALIGNED IMPACT-IONIZATION FIELD EFFECT TRANSISTOR
#26 | 2010-02-04Double patterning for lithography to increase feature spatial density
#27 | 2009-12-10METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH DIFFERENT METALLIC GATES
#28 | 2009-10-01Double-gate semiconductor devices having gates with different work functions and methods of manufacture thereof
#29 | 2008-10-23Source and Drain Formation in Silicon on Insulator Device
#30 | 2008-10-02Method of Manufacturing a Semiconductor Device and Semiconductor Device Obtained With Such a Method
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