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Inventor profile of:

Peter J. Beckage

City:

Austin, Texas

Country:

United States

Published Applications:

6

Last publication date:

2007-10-25

Top Assignees for applications by Peter J. Beckage

The entities that hold a legal rights for patent applications filed by inventor Beckage Peter J.:

  • FREESCALE SEMICONDUCTOR, INC 3 Austin, TX United States

Recent patent applications by Beckage Peter J.

Peter J. Beckage from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2007-10-25
US20070249129A1
Electricity

STI stressor integration for minimal phosphoric exposure and divot-free topography

#2 | 2007-10-25
US20070246793A1
Electricity

Process of forming an electronic device including a semiconductor layer and another layer adjacent to an opening within the semiconductor layer

#3 | 2007-09-20
US20070218659A1
Electricity

Selective silicon deposition for planarized dual surface orientation integration

#4 | 2007-09-20
US20070218654A1
Electricity

Silicon deposition over dual surface orientation substrates to promote uniform polishing

#5 | 2007-05-10
US20070105247A1
Electricity

Method And Apparatus For Detecting The Endpoint Of A Chemical-Mechanical Polishing Operation

#6 | 2006-10-19
US20060234467A1
Physics

Method of forming trench isolation in a semiconductor device

InventorID:

4409145 ⎘

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