Inventor profile of:

Mark Williams

City:

Glos

Country:

United Kingdom

Published Applications:

17

Last publication date:

2015-02-24

Top Assignees for applications by Mark Williams

The entities that hold a legal rights for patent applications filed by inventor Williams Mark:

Recent patent applications by Williams Mark

Mark Williams from Glos, GB has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2015-02-24
US13829512
Physics

Clock tree generation and routing

#2 | 2014-07-22
US13933889
-

Automatic routing system with variable width interconnect

#3 | 2014-06-10
US13711535
-

Automatically routing nets according to parasitic constraint rules

#4 | 2013-07-02
US13352232
-

Automation using spine routing

#5 | 2013-07-02
US12833886
-

Automatic routing system with variable width interconnect

#6 | 2012-12-11
US13180256
-

Automatically routing nets according to parasitic constraint rules

#7 | 2012-05-01
US12408211
-

Automatically routing nets according to current density rules

#8 | 2012-01-17
US11838726
-

Automatic integrated circuit routing using spines

#9 | 2011-08-30
US12048948
-

Automatically routing nets according to parasitic constraint rules

#10 | 2010-10-26
US11530613
-

Automatic integrated circuit routing using spines

#11 | 2010-09-21
US11838704
-

Design automation using spine routing

#12 | 2010-08-24
US10709844
-

Automatic routing system with variable width interconnect

#13 | 2009-05-05
US11383658
-

Automatically routing nets according to current density rules

#14 | 2008-05-13
US11383673
-

Method of automatically routing nets using a Steiner tree

#15 | 2007-08-14
US10908895
-

Method of automatic shape-based routing of interconnects in spines for integrated circuit design

#16 | 2007-05-10
US20070106969A1
Physics

Method of automatically routing nets according to parasitic constraint rules

#17 | 2006-10-31
US10709843
-

Method of automatically routing nets according to current density rules

InventorID:

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