Inventor profile of:

Chenming Hu

City:

Hsinchu

Country:

Taiwan

Published Applications:

15

Last publication date:

2007-08-16

Top Assignees for applications by Chenming Hu

The entities that hold a legal rights for patent applications filed by inventor Hu Chenming:

Recent patent applications by Hu Chenming

Chenming Hu from Hsinchu, TW has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2007-08-16
US20070190702A1
Electricity

Strained silicon-on-insulator transistors with mesa isolation

#2 | 2007-05-24
US20070117352A1
Electricity

Method for dicing semiconductor wafers

#3 | 2007-05-08
US10313887
-

CMOS inverters configured using multiple-gate transistors

#4 | 2007-02-06
US10409810
-

Self-aligned contact for silicon-on-insulator devices

#5 | 2007-01-02
US10356036
-

Strained silicon-on-insulator transistors with mesa isolation

#6 | 2006-11-28
US10388297
-

Silicon-on-insulator ULSI devices with multiple silicon film thicknesses

#7 | 2006-08-03
US20060170053A1
Electricity

Accumulation mode multiple gate transistor

#8 | 2006-07-25
US10444874
-

Silicon strain engineering accomplished via use of specific shallow trench isolation fill materials

#9 | 2005-12-01
US20050263828A1
Electricity

High performance semiconductor devices fabricated with strain-induced processes and methods for making same

#10 | 2005-10-18
US10383709
-

Strain balanced structure with a tensile strained silicon channel and a compressive strained silicon-germanium channel for CMOS performance enhancement

#11 | 2005-06-02
US20050118790A1
Electricity

Method for dicing semiconductor wafers

#12 | 2005-04-14
US20050079677A1
Electricity

High performance semiconductor devices fabricated with strain-induced processes and methods for making same

#13 | 2005-03-08
US10305728
-

CMOS SRAM cell configured using multiple-gate transistors

#14 | 2005-01-25
US10641575
-

Non-floating body device with enhanced performance

#15 | 2005-01-18
US10401087
-

Multiple-gate transistors with improved gate control

InventorID:

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