Teruo Kisu

City:

Tokyo

Country:

Japan

Published Applications:

Last publication date:

2007-08-30

Top Assignees for applications by Teruo Kisu

The entities that hold a legal rights for patent applications filed by inventor Kisu Teruo:

Teruo Kisu from Tokyo, JP has applied for patents for these inventions. The list has both pending applications and granted patents:

Vertical misfet manufacturing method, vertical misfet, semiconductor memory device manufacturing method, and semiconductor memory device

Longitudinal MISFET manufacturing method, longitudinal MISFET, semiconductor storage device manufacturing method, and semiconductor storage device

InventorID:

4479688 ⎘