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Inventor profile of:

Mikhail NAGOGA

City:

Pully

Country:

Switzerland

Published Applications:

26

Last publication date:

2025-04-17

Top Assignees for applications by Mikhail NAGOGA

The entities that hold a legal rights for patent applications filed by inventor NAGOGA Mikhail:

Micron Technology, Inc. 13 Boise, ID United States
Innovative Silicon ISi SA 5 Lausanne, Switzerland
LMD IP, LLC 4 Oklahoma City, OK United States
LEMAN MICRO DEVICES SA 3 Lausanne, Switzerland
Innovative Silicon S.A. 2 Lausanne, Switzerland

Recent patent applications by NAGOGA Mikhail

Mikhail NAGOGA from Pully, CH has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-04-17

US20250120656A1

Human necessities

PERSONAL HEALTH DATA COLLECTION

#2 | 2025-03-20

US20250090098A1

Human necessities

PERSONAL HEALTH DATA COLLECTION

#3 | 2022-12-15

US20220395231A1

Human necessities

Personal health data collection

#4 | 2021-11-25

US20210361242A1

Human necessities

Personal health data collection

#5 | 2019-10-24

US20190320984A1

Human necessities

Personal health data collection

#6 | 2017-12-21

US20170360374A1

Human necessities

Personal health data collection

#7 | 2015-02-19

US20150051500A1

Human necessities

Personal health data collection

#8 | 2014-11-27

US20140349450A1

Techniques for providing a semiconductor memory device

#9 | 2013-09-26

US20130250699A1

Techniques for providing a semiconductor memory device

#10 | 2013-09-26

US20130250674A1

Refreshing data of memory cells with electrically floating body transistors

#11 | 2012-09-20

US20120236671A1

Refreshing data of memory cells with electrically floating body transistors

#12 | 2012-04-19

US20120092942A1

Techniques for reading a memory cell with electrically floating body transistor

#13 | 2011-08-11

US20110194363A1

Semiconductor memory cell and array using punch-through to program and read same

#14 | 2011-01-13

US20110007578A1

Techniques for providing a semiconductor memory device

#15 | 2010-10-28

US20100271857A1

Techniques for providing a direct injection semiconductor memory device

#16 | 2010-01-28

US20100020597A1

Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same

#17 | 2009-08-13

US20090201723A1

Single transistor memory cell

#18 | 2009-03-26

US20090080244A1

Refreshing data of memory cells with electrically floating body transistors

#19 | 2009-01-15

US20090016101A1

Reading technique for memory cell with electrically floating body transistor

#20 | 2008-01-31

US20080025083A1

Bipolar reading technique for a memory cell having an electrically floating body transistor

#21 | 2007-11-08

US20070257291A1

Semiconductor memory cell and array using punch-through to program and read same

#22 | 2007-03-15

US20070058427A1

Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same

#23 | 2007-02-01

US20070023833A1

Method for reading a memory cell having an electrically floating body transistor, and memory cell and array implementing same

#24 | 2006-06-22

US20060131650A1

Bipolar reading technique for a memory cell having an electrically floating body transistor

#25 | 2006-05-11

US20060098481A1

Circuitry for and method of improving statistical distribution of integrated circuits

#26 | 2006-05-04

US20060091462A1

Memory cell having an electrically floating body transistor and programming technique therefor

InventorID:

453842 ⎘