Toronto
Canada
23
2025-06-17
The entities that hold a legal rights for patent applications filed by inventor Cashman David:
David Cashman from Toronto, CA has applied for patents for these inventions. The list has both pending applications and granted patents:
Nested array batch processing
#2 | 2017-11-09STRUCTURES FOR LUT-BASED ARITHMETIC IN PLDS
#3 | 2017-05-23Structures for LUT-based arithmetic in PLDs
#4 | 2015-05-12Methods and apparatus for providing redundancy on multi-chip devices
#5 | 2014-10-14Programmable integrated circuits with redundant circuitry
#6 | 2014-07-22Structures for LUT-based arithmetic in PLDs
#7 | 2013-10-03Integrated circuits with multi-stage logic regions
#8 | 2012-08-14Methods and systems for managing a write operation
#9 | 2012-05-10Robust time borrowing pulse latches
#10 | 2011-05-05Configurable time borrowing flip-flops
#11 | 2011-04-21Robust time borrowing pulse latches
#12 | 2010-05-11Programmable logic device architectures and methods for implementing logic in those architectures
#13 | 2009-11-17Programmable logic device architectures and methods for implementing logic in those architectures
#14 | 2009-11-12Configurable time borrowing flip-flops
#15 | 2009-10-01Robust time borrowing pulse latches
#16 | 2009-08-25Programmable logic device with configurable override of region-wide signals
#17 | 2009-07-07Structures for LUT-based arithmetic in PLDs
#18 | 2008-10-02Configurable time borrowing flip-flops
#19 | 2008-09-25Staggered logic array block architecture
#20 | 2008-09-11Programmable logic device having logic array block interconnect lines that can interconnect logic elements in different logic blocks
#21 | 2008-09-11Programmable logic device having redundancy with logic element granularity
#22 | 2007-09-11Adder circuitry for a programmable logic device
#23 | 2007-02-27Method and apparatus for enhancing signal routability
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