Inventor profile of:

David Cashman

City:

Toronto

Country:

Canada

Published Applications:

23

Last publication date:

2025-06-17

Top Assignees for applications by David Cashman

The entities that hold a legal rights for patent applications filed by inventor Cashman David:

Recent patent applications by Cashman David

David Cashman from Toronto, CA has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-06-17
US17884099
Physics

Nested array batch processing

#2 | 2017-11-09
US20170322775A1
Physics

STRUCTURES FOR LUT-BASED ARITHMETIC IN PLDS

#3 | 2017-05-23
US14320499
Physics

Structures for LUT-based arithmetic in PLDs

#4 | 2015-05-12
US13971005
Electricity

Methods and apparatus for providing redundancy on multi-chip devices

#5 | 2014-10-14
US13669244
-

Programmable integrated circuits with redundant circuitry

#6 | 2014-07-22
US12484010
-

Structures for LUT-based arithmetic in PLDs

#7 | 2013-10-03
US20130257476A1
Electricity

Integrated circuits with multi-stage logic regions

#8 | 2012-08-14
US12829206
-

Methods and systems for managing a write operation

#9 | 2012-05-10
US20120112791A1
Electricity

Robust time borrowing pulse latches

#10 | 2011-05-05
US20110102017A1
Electricity

Configurable time borrowing flip-flops

#11 | 2011-04-21
US20110089974A1
Electricity

Robust time borrowing pulse latches

#12 | 2010-05-11
US12580038
-

Programmable logic device architectures and methods for implementing logic in those architectures

#13 | 2009-11-17
US11356762
-

Programmable logic device architectures and methods for implementing logic in those architectures

#14 | 2009-11-12
US20090278566A1
Electricity

Configurable time borrowing flip-flops

#15 | 2009-10-01
US20090243687A1
Electricity

Robust time borrowing pulse latches

#16 | 2009-08-25
US11479311
-

Programmable logic device with configurable override of region-wide signals

#17 | 2009-07-07
US10723104
-

Structures for LUT-based arithmetic in PLDs

#18 | 2008-10-02
US20080238476A1
Electricity

Configurable time borrowing flip-flops

#19 | 2008-09-25
US20080231317A1
Electricity

Staggered logic array block architecture

#20 | 2008-09-11
US20080218208A1
Electricity

Programmable logic device having logic array block interconnect lines that can interconnect logic elements in different logic blocks

#21 | 2008-09-11
US20080218197A1
Electricity

Programmable logic device having redundancy with logic element granularity

#22 | 2007-09-11
US11193125
-

Adder circuitry for a programmable logic device

#23 | 2007-02-27
US10915647
-

Method and apparatus for enhancing signal routability

InventorID:

464031 ⎘