Inventor profile of:

Jay P. John

City:

Chandler, Arizona

Country:

United States

Published Applications:

17

Last publication date:

2014-05-29

Top Assignees for applications by Jay P. John

The entities that hold a legal rights for patent applications filed by inventor John Jay P.:

Recent patent applications by John Jay P.

Jay P. John from Chandler, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2014-05-29
US20140147985A1
Electricity

METHODS FOR THE FABRICATION OF SEMICONDUCTOR DEVICES INCLUDING SUB-ISOLATION BURIED LAYERS

#2 | 2014-05-15
US20140131772A1
Electricity

Semiconductor devices with recessed base electrode

#3 | 2014-01-02
US20140001650A1
Electricity

Electronic device including interconnects with a cavity therebetween and a process of forming the same

#4 | 2013-10-10
US20130266042A1
Physics

Temperature sensor

#5 | 2012-08-09
US20120199881A1
Electricity

Bipolar transistor and method with recessed base electrode

#6 | 2012-04-05
US20120080804A1
Electricity

Electronic device including interconnects with a cavity therebetween and a process of forming the same

#7 | 2011-09-08
US20110215411A1
Electricity

Double gate MOSFET with coplanar surfaces for contacting source, drain, and bottom gate

#8 | 2010-12-16
US20100314664A1
Electricity

Silicided base structure for high frequency transistors

#9 | 2010-03-11
US20100059860A1
Electricity

Counter-doped varactor structure and method

#10 | 2010-01-21
US20100013051A1
Electricity

Method of forming a bipolar transistor and semiconductor component thereof

#11 | 2009-12-31
US20090321879A1
Electricity

Silicided base structure for high frequency transistors

#12 | 2009-12-31
US20090321788A1
Electricity

Dielectric ledge for high frequency devices

#13 | 2008-02-28
US20080050902A1
Electricity

Method for forming an independent bottom gate connection for buried interconnection including bottom gate of a planar double gate MOSFET

#14 | 2007-12-20
US20070293013A1
Electricity

Method of forming a bipolar transistor and semiconductor component thereof

#15 | 2007-12-20
US20070293004A1
Electricity

Integrated CMOS and bipolar devices method and structure

#16 | 2007-12-20
US20070290231A1
Electricity

Method of manufacturing a bipolar transistor and bipolar transistor thereof

#17 | 2006-11-30
US20060270164A1
Electricity

Method of making planar double gate silicon-on-insulator structures

InventorID:

475950 ⎘