David B. Kramer

Non-volatile RAM system

System and method for conditional task switching during ordering scope transitions

Explicit barrier scheduling mechanism for pipelining of stream processing algorithms

Configurable peripheral componenent interconnect express (PCIe) controller

System and method for assigning memory access transfers between communication channels

System and method for transferring data between components of a data processor

System and method for maintaining packet order in an ordered data stream

System and method for assigning a message

Processor interrupt interface with interrupt partitioning and virtualization enhancements

Interrupt priority management using partition-based priority blocking processor registers

Virtualized interrupt delay mechanism

Virtualized instruction extensions for system partitioning

System and method for direct memory access buffer utilization by setting DMA controller with plurality of arbitration weights associated with different DMA engines

Controller for managing a reset of a subset of threads in a multi-thread system

Message passing using direct memory access unit in a data processing system

Bandwidth control for a direct memory access unit within a data processing system

System and method for scalable movement and replication of data

Scheduling memory access requests using predicted memory timing and state information

Asynchronously scheduling memory access requests

Method and apparatus for determining access permissions in a partitioned data processing system

System and method for implementing ACLs using standard LPM engine

System and method for implementing ACLs using multiple hash-trie-key tables