Santa Clara, California
United States
34
2024-11-07
The entities that hold a legal rights for patent applications filed by inventor Drowley Clifford:
Clifford Drowley from Santa Clara, US has applied for patents for these inventions. The list has both pending applications and granted patents:
METHOD OF FABRICATING SUPER-JUNCTION BASED VERTICAL GALLIUM NITRIDE JFET AND MOSFET POWER DEVICES
#2 | 2024-08-15Fabrication method for JFET with implant isolation
#3 | 2024-08-15SELF-ALIGNED ISOLATION FOR SELF-ALIGNED CONTACTS FOR VERTICAL FETS
#4 | 2024-08-15Method and system for fabricating fiducials using selective area growth
#5 | 2024-08-01REGROWTH UNIFORMITY IN GAN VERTICAL DEVICES
#6 | 2024-07-18METHOD AND SYSTEM FOR ETCH DEPTH CONTROL IN III-V SEMICONDUCTOR DEVICES
#7 | 2024-04-11NEGATIVE CHARGE EXTRACTION STRUCTURE FOR EDGE TERMINATION
#8 | 2024-03-28Method of fabricating super-junction based vertical gallium nitride JFET and MOSFET power devices
#9 | 2023-12-28VERTICAL GALLIUM NITRIDE BASED FETS WITH REGROWN SOURCE CONTACTS
#10 | 2023-12-21Method and system for fabrication of a vertical fin-based field effect transistor
#11 | 2023-11-23Method and system for fin-based voltage clamp
#12 | 2023-11-23METHOD AND SYSTEM FOR ROUTING OF ELECTRICAL CONDUCTORS OVER NEUTRALIZED POWER FETS
#13 | 2023-11-09VERTICAL FIN-BASED FIELD EFFECT TRANSISTOR (FINFET) WITH CONNECTED FIN TIPS
#14 | 2023-08-17VERTICAL FIN-BASED FIELD EFFECT TRANSISTOR (FINFET) WITH VARYING CONDUCTIVITY REGIONS
#15 | 2023-08-03VERTICAL FIN-BASED FIELD EFFECT TRANSISTOR (FINFET) WITH NEUTRALIZED FIN TIPS
#16 | 2023-07-20METHOD AND SYSTEM FOR FABRICATING FIDUCIALS FOR PROCESSING OF SEMICONDUCTOR DEVICES
#17 | 2023-07-20METHOD AND SYSTEM FOR FABRICATING REGROWN FIDUCIALS FOR SEMICONDUCTOR DEVICES
#18 | 2023-07-06Fabrication method for JFET with implant isolation
#19 | 2023-04-27Method of fabricating super-junction based vertical gallium nitride JFET and MOSFET power devices
#20 | 2022-10-13Method and system for control of sidewall orientation in vertical gallium nitride field effect transistors
#21 | 2022-10-13Methods and systems to improve uniformity in power FET arrays
#22 | 2022-09-29Method and system for fabrication of a vertical fin-based field effect transistor
#23 | 2022-09-15Method and system for fabricating fiducials using selective area growth
#24 | 2022-08-11METHODS AND SYSTEMS FOR FABRICATION OF VERTICAL FIN-BASED JFETS
#25 | 2022-07-28Coupled guard rings for edge termination
#26 | 2022-01-20Self-aligned isolation for self-aligned contacts for vertical FETS
#27 | 2022-01-13Method and system of junction termination extension in high voltage semiconductor devices
#28 | 2021-12-30Method and system for etch depth control in III-V semiconductor devices
#29 | 2021-12-23Super-junction based vertical gallium nitride JFET power devices
#30 | 2021-09-30Method for regrown source contacts for vertical gallium nitride based FETS
#31 | 2021-07-08Regrowth uniformity in GaN vertical devices
#32 | 2021-06-24JFET with implant isolation
#33 | 2021-01-28Method and system for fabrication of a vertical fin-based field effect transistor
#34 | 2021-01-21Method and system for fabricating fiducials using selective area growth
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