Newark, California
United States
28
2024-03-21
The entities that hold a legal rights for patent applications filed by inventor Nair Krishnakumar Narayanan:
Krishnakumar Narayanan Nair from Newark, US has applied for patents for these inventions. The list has both pending applications and granted patents:
FLEXIBLE MATRIX PROCESSING
#2 | 2023-09-19Systems and methods for reducing power consumption of convolution operations for artificial neural networks
#3 | 2023-08-10HIGH BANDWIDTH MEMORY SYSTEM WITH DYNAMICALLY PROGRAMMABLE DISTRIBUTION SCHEME
#4 | 2023-03-07Systems and methods for reducing power consumption of convolution operations of artificial neural networks
#5 | 2023-02-23USING A LOW-BIT-WIDTH DOT PRODUCT ENGINE TO SUM HIGH-BIT-WIDTH NUMBERS
#6 | 2023-01-05HIGH THROUGHPUT MATRIX PROCESSOR WITH SUPPORT FOR CONCURRENTLY PROCESSING MULTIPLE MATRICES
#7 | 2022-11-24Device and method for flexibly summing matrix values
#8 | 2022-11-17MATRIX PROCESSING INSTRUCTION WITH OPTIONAL UP/DOWN SAMPLING OF MATRIX
#9 | 2022-11-15Systems and methods for handling padding regions in convolution operations
#10 | 2022-04-07FLOATING POINT MULTIPLY HARDWARE USING DECOMPOSED COMPONENT NUMBERS
#11 | 2021-11-11Device and method for flexibly summing matrix values
#12 | 2021-11-11Using a low-bit-width dot product engine to sum high-bit-width numbers
#13 | 2021-10-28MAPPING CONVOLUTION TO CONNECTED PROCESSING ELEMENTS USING DISTRIBUTED PIPELINED SEPARABLE CONVOLUTION OPERATIONS
#14 | 2021-10-21High bandwidth memory system with distributed request broadcasting masters
#15 | 2021-10-14Grouped convolution using point-to-point connected channel convolution engines
#16 | 2021-09-23Pipelined pointwise convolution using per-channel convolution operations
#17 | 2021-09-02Mapping convolution to a partition channel convolution engine
#18 | 2021-08-19Mapping convolution to a channel convolution engine
#19 | 2021-08-19Hardware for floating-point arithmetic in multiple formats
#20 | 2021-06-24Systems and methods for reducing data movement during convolution operations in artificial neural networks
#21 | 2021-06-17High bandwidth memory system with crossbar switch for dynamically programmable distribution scheme
#22 | 2021-06-17High bandwidth memory system with distributed request broadcasting masters
#23 | 2021-06-10Matrix processing instruction with optional up/down sampling of matrix
#24 | 2021-06-03High bandwidth memory system with dynamically programmable distribution scheme
#25 | 2021-04-29Support for different matrix multiplications by selecting adder tree intermediate results
#26 | 2021-04-29High throughput matrix processor with support for concurrently processing multiple matrices
#27 | 2021-04-08Floating point multiply hardware using decomposed component numbers
#28 | 2020-12-22Memory organization for matrix processing
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