Inventor profile of:

Cheng-Jer YANG

City:

Hefei

Country:

China

Published Applications:

14

Last publication date:

2024-05-23

Top Assignees for applications by Cheng-Jer YANG

The entities that hold a legal rights for patent applications filed by inventor YANG Cheng-Jer:

Recent patent applications by YANG Cheng-Jer

Cheng-Jer YANG from Hefei, CN has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2024-05-23
US20240170329A1
Electricity

Semiconductor Structure and Method of Making the Same

#2 | 2023-09-07
US20230282617A1
Electricity

SEMICONDUCTOR STRUCTURE

#3 | 2023-06-15
US20230187005A1
Physics

Testing method for packaged chip, testing system for packaged chip, computer device and storage medium

#4 | 2023-01-19
US20230015241A1
Electricity

Memory structure including elastic material based buffer column structure near contact structure to improve stability of connection

#5 | 2022-12-15
US20220399068A1
Physics

Testing method, testing system, and testing apparatus for semiconductor chip

#6 | 2022-12-01
US20220383940A1
Physics

Readout circuit layout structure, readout circuit, and memory layout structure

#7 | 2022-09-29
US20220310152A1
Physics

Word line driving circuit and dynamic random access memory

#8 | 2022-04-28
US20220130460A1
Physics

Word line drive circuit and dynamic random access memory

#9 | 2022-03-31
US20220100410A1
Physics

Circuit for testing a memory and test method thereof

#10 | 2022-02-03
US20220034939A1
Physics

METHOD AND APPARATUS FOR JUDGING ABNORMALITY OF PROBE CARD

#11 | 2021-08-05
US20210239751A1
Physics

Through-silicon via detecting circuit, detecting methods and integrated circuit thereof

#12 | 2021-05-27
US20210156913A1
Physics

Boundary test circuit, memory and boundary test method

#13 | 2021-05-27
US20210156908A1
Physics

Through-silicon via (TSV) fault-tolerant circuit, method for TSV fault-tolerance and integrated circuit (IC)

#14 | 2021-04-08
US20210104289A1
Physics

Memory test circuit apparatus and test method

InventorID:

5048747 ⎘