Bin Yang

ADVANCED ACTIVE POWER DISTRIBUTION NETWORK (PDN) INTEGRATION

INTEGRATED CIRCUIT (IC) PACKAGE WITH EMBEDDED POWER MANAGEMENT INTEGRATED CIRCUIT (PMIC)

INTEGRATED CIRCUITS WITH TWO-SIDE METALLIZATION AND EXTERNAL STIFFENING LAYER AND RELATED FABRICATION METHODS

FIELD-EFFECT TRANSISTORS (FETS) EMPLOYING THERMAL EXPANSION OF WORK FUNCTION METAL LAYERS FOR STRAIN EFFECT AND RELATED FABRICATION METHODS

SUBSTRATE WITH MULTIPLE CORE LAYERS TO PROVIDE VARIED THICKNESS CAVITIES SUPPORTING VARIED THICKNESS EMBEDDED ELECTRICAL DEVICES, AND RELATED INTEGRATED CIRCUIT (IC) PACKAGES AND FABRICATION METHODS

BACK-END-OF-LINE (BEOL) INTERCONNECTS WITH DIFFERENT AIRGAP HEIGHTS AND METAL TRACE CORNER PROTECTION STRUCTURES

OPTIMIZATION OF VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR INTEGRATION

OPTIMIZATION OF VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR INTEGRATION

2D-MATERIAL GATE-ALL-AROUND COMPLEMENTARY FET INTEGRATION

MONOLITHIC THREE-DIMENSIONAL (3D) COMPLEMENTARY FIELD EFFECT TRANSISTOR (CFET) CIRCUITS AND METHOD OF MANUFACTURE

STACKED COMPLEMENTARY FIELD EFFECT TRANSISTOR (CFET) AND METHOD OF MANUFACTURE

Three-dimensional (3D) interconnect structures employing via layer conductive structures in via layers and related fabrication methods

Mitigation of duty-cycle distortion

THREE DIMENSIONAL (3D) DOUBLE GATE SEMICONDUCTOR

Dynamic aging monitor and correction for critical path duty cycle and delay degradation

One transistor one magnetic tunnel junction multiple bit magnetoresistive random access memory cell

Three dimensional (3D) vertical spiral inductor and transformer

POWER DECOUPLING METAL-INSULATOR-METAL CAPACITOR

P-type field effect transistor (PFET) on a silicon germanium (Ge) buffer layer to increase Ge in the PFET source and drain to increase compression of the PFET channel and method of fabrication

SELF-ALIGNED LOW RESISTANCE BURIED POWER RAIL THROUGH SINGLE DIFFUSION BREAK DUMMY GATE

MULTI-CHANNEL GATE-ALL-AROUND HIGH-ELECTRON-MOBILITY TRANSISTOR

HIGH DENSITY METAL-INSULATOR-METAL CAPACITOR

DOUBLE-SIDE BACK-END-OF-LINE METALLIZATION FOR PSEUDO THROUGH-SILICON VIA INTEGRATION

Semiconductor device implemented with buried rails

INTEGRATING A GATE-ALL-AROUND (GAA) TRANSISTOR WITH A SILICON GERMANIUM (SiGe) HETEROJUNCTION BIPOLAR TRANSISTOR (HBT)

GATE-ALL-AROUND (GAA) TRANSISTOR WITH INSULATOR ON SUBSTRATE AND METHODS OF FABRICATING

DOUBLE DIFFUSION BREAK GATES FULLY OVERLAPPING FIN EDGES WITH INSULATOR REGIONS

III-V compound semiconductor dies with stress-treated inactive surfaces to avoid packaging-induced fractures, and related methods

Integrated device comprising transistor coupled to a dummy gate contact

Thermal paths for glass substrates

STRAINED SILICON TRANSISTOR

Distributed feedback (DFB) laser on silicon and integrated device comprising a DFB laser on silicon

Vertically stacked multilayer high-density RRAM

Gate all around transistors with high charge mobility channel materials

Fin field-effect transistor (FinFET) static random access memory (SRAM) having pass-gate transistors with offset gate contact regions

Nanosheet (NS) and fin field-effect transistor (FinFET) hybrid integration

Ferroelectric transistor

Static random-access memory (SRAM) compute in-memory integration

CIRCUITS EMPLOYING ON-DIFFUSION (OD) EDGE (ODE) DUMMY GATE STRUCTURES IN CELL CIRCUIT WITH INCREASED GATE DIELECTRIC THICKNESS TO REDUCE LEAKAGE CURRENT

VERTICAL RESISTIVE RANDOM ACCESS MEMORY

GATE-ALL-AROUND RESISTIVE RANDOM ACCESS MEMORY (RRAM)

FinFET semiconductor device

Integration of vertical GaN varactor with HEMT

INTEGRATED DEVICES COMPRISING UNIFORM METAL LAYER THICKNESS ACROSS ONE OR MORE METAL LAYERS

Integration of vertical GaN varactor with HEMT

DISCONTINUOUS CHARGE TRAP LAYER MEMORY DEVICE

PASSIVE ON GLASS PLANARIZATION

RESISTIVE RANDOM ACCESS MEMORY (RRAM) DEVICES EMPLOYING BOUNDED FILAMENT FORMATION REGIONS, AND RELATED METHODS OF FABRICATING

Heterojunction bipolar transistor with field plates

METAL-INSULATOR-SEMICONDUCTOR (MIS) RESISTIVE RANDOM ACCESS MEMORY (RRAM) (MIS RRAM) DEVICES AND MIS RRAM BIT CELL CIRCUITS, AND RELATED METHODS OF FABRICATING

Techniques for thermal matching of integrated circuits

Heterojunction bipolar transistors with field plates

HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) FIN FIELD-EFFECT TRANSISTOR (FINFET)

Vertically-integrated two-dimensional (2D) semiconductor slabs in complementary field effect transistor (CFET) cell circuits, and method of fabricating

Photo detectors

HORIZONTAL GATE-ALL-AROUND (GAA) FIELD EFFECT TRANSISTOR (FET) FOR COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) INTEGRATION

TRANSISTORS WITH LOW CONTACT RESISTANCE AND METHOD OF FABRICATING THE SAME

MEMORY IMPLEMENTED USING NEGATIVE CAPACITANCE MATERIAL

Thin-film variable metal-oxide-semiconductor (MOS) capacitor for passive-on-glass (POG) tunable capacitor

THREE-DIMENSIONAL (3D) CARBON NANOTUBE GATE METAL OXIDE (MOS) FIELD-EFFECT TRANSISTORS (FETs) (MOSFETS), AND RELATED FABRICATION PROCESSES

Low resistance source/drain regions in III-V transistors

HIGH PERFORMANCE THIN FILM TRANSISTOR WITH NEGATIVE INDEX MATERIAL

High power performance gallium nitride high electron mobility transistor with ledges and field plates

LOW COLLECTOR CONTACT RESISTANCE HETEROJUNCTION BIPOLAR TRANSISTORS

Variable capacitor

Rotated metal-oxide-metal (RTMOM) capacitor

Controlling dimensions of a negative capacitance layer of a gate stack of a field-effect transistor (FET) to increase power density

MULTIPLE LAYER CYLINDRICAL CAPACITOR

Gallium nitride power amplifier integration with metal-oxide-semiconductor devices

GALLIUM-NITRIDE-BASED TRANSCAPS FOR MILLIMETER WAVE APPLICATIONS

Double gate, flexible thin-film transistor (TFT) complementary metal-oxide semiconductor (MOS) (CMOS) circuits and related fabrication methods

Thermally enhanced substrate

Variable thickness gate oxide transcap

Low collector contact resistance heterojunction bipolar transistors

Complementary metal-oxide semiconductor (CMOS) integration with compound semiconductor devices

SURFACE ACOUSTIC WAVE DEVICES AND METHOD OF FABRICATING THE SAME

Heterojunction bipolar transistors and method of fabricating the same

HETEROJUNCTION BIPOLAR TRANSISTOR POWER AMPLIFIER WITH BACKSIDE THERMAL HEATSINK

Compact and reliable physical unclonable function devices and methods

Transistor with fluorinated graphene spacer

MIDDLE-OF-LINE (MOL) METAL RESISTOR TEMPERATURE SENSORS FOR LOCALIZED TEMPERATURE SENSING OF ACTIVE SEMICONDUCTOR AREAS IN INTEGRATED CIRCUITS (ICs)

Heterojunction bipolar transistor (HBT)

Integrated circuit with metal gate having dielectric portion over isolation area

MIM capacitor containing negative capacitance material

MIDDLE-OF-LINE SHIELDED GATE FOR INTEGRATED CIRCUITS

COMPOUND SEMICONDUCTOR FIELD EFFECT TRANSISTOR WITH SELF-ALIGNED GATE

Bi-stable static random access memory (SRAM) bit cells that facilitate direct writing for storage

Planar double gate semiconductor device

Silicon on insulator (SOI) transcap integration providing front and back gate capacitance tuning

COMPOSITE CHANNEL METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET)

Enhanced active and passive devices for radio frequency (RF) process and design technology

Bi-stable static random access memory (SRAM) bit cells formed from III-V compounds and configured to achieve higher operating speeds

Non-volative (NV) memory (NVM) matrix circuits employing NVM matrix circuits for performing matrix computations

High power compound semiconductor field effect transistor devices with low doped drain

Voltage-switched magneto-resistive random access memory (MRAM) employing separate read operation circuit paths from a shared spin torque write operation circuit path

Pseudomorphic high electron mobility transistor with low contact resistance

Self-aligned contact (SAC) on gate for improving metal oxide semiconductor (MOS) varactor quality factor

Graphene as interlayer dielectric

Transistor with fluorinated graphene spacer

Transistor with low resistivity carbon alloy