Sungjun Chun

PROCESSOR PACKAGE SUBSTRATE WITH HIGH-SPEED TOP-SURFACE CONNECTION TO CABLE INTERCONNECT

DENSE VIA PITCH INTERCONNECT TO INCREASE WIRING DENSITY

CLUSTERING FINE PITCH MICRO-BUMPS FOR PACKAGING AND TEST

Dense via pitch interconnect to increase wiring density

MULTICOMPONENT MODULE DESIGN AND FABRICATION

PCB with substrate integrated waveguides using multi-band monopole antenna feeds for high speed communication

Vertically transitioning between substrate integrated waveguides (SIWs) within a multilayered printed circuit board (PCB)

Method for fabricating a hybrid land grid array connector

Connector having a body with a conductive layer common to top and bottom surfaces of the body as well as to wall surfaces of a plurality of holes in the body

Crosstalk reduction between signal layers in a multilayered package by variable-width mesh plane structures

Signal via positioning in a multi-layer circuit board using a genetic via placement solver

Signal via positioning in a multi-layer circuit board using a genetic via placement solver

Signal via positioning in a multi-layer circuit board

Signal via positioning in a multi-layer circuit board using a genetic via placement solver

Signal via positioning in a multi-layer circuit board using a genetic via placement solver

Signal via positioning in a multi-layer circuit board

Signal via positioning in a multi-layer circuit board

Printed circuit board copper plane repair

Method of making a printed circuit board copper plane repair

Printed circuit board copper plane repair

Managing interconnect electromigration effects

Crosstalk reduction between signal layers in a multilayered package by variable-width mesh plane structures

Multi-layer circuit substrate fabrication method providing improved transmission line integrity and increased routing density

System for designing substrates having reference plane voids with strip segments

276-pin buffered memory card with enhanced memory system interconnect

Circuit manufacturing and design techniques for reference plane voids with strip segment

Circuit manufacturing and design techniques for reference plane voids with strip segment

Noise coupling reduction and impedance discontinuity control in high-speed ceramic modules

Crosstalk reduction between signal layers in a multilayered package by variable-width mesh plane structures

Redundant clock channel for high reliability connectors

Noise coupling reduction and impedance discontinuity control in high-speed ceramic modules

Reducing crosstalk in the design of module nets

Circuit manufacturing and design techniques for reference plane voids with strip segment

Detecting open ground connections in surface mount connectors

Multi-layer circuit substrate fabrication and design methods providing improved transmission line integrity and increased routing density

Apparatus for Suppressing Mid-Frequency Noise in an Integrated Circuit Having Multiple Voltage Islands

Reference plane voids with strip segment for improving transmission line integrity over vias

Method of reducing crosstalk induced noise in circuitry designs

Multi-layer circuit substrate and method having improved transmission line integrity and increased routing density

System and Method of Integrated Circuit Control for in Situ Impedance Measurement

Measuring microprocessor susceptibility to internal noise generation

System and Method for Noise Reduction in Multi-Layer Ceramic Packages

System and method for noise reduction in multi-layer ceramic packages