Inventor profile of:

Danilo Caraccio

City:

Milan

Country:

Italy

Published Applications:

62

Last publication date:

2025-08-28

Top Assignees for applications by Danilo Caraccio

The entities that hold a legal rights for patent applications filed by inventor Caraccio Danilo:

Recent patent applications by Caraccio Danilo

Danilo Caraccio from Milan, IT has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-08-28
US20250272393A1
Physics

CLASSIFICATION AND MITIGATION OF COMPUTE EXPRESS LINK SECURITY THREATS

#2 | 2025-03-20
US20250094343A1
Physics

DYNAMIC PAGE MAPPING WITH COMPRESSION

#3 | 2025-03-20
US20250094278A1
Physics

RAS TRIGGERS L2P TABLE MOVEMENT IN CXL DEVICES WITH COMPRESSION

#4 | 2025-02-13
US20250053343A1
Physics

ROW HAMMER TELEMETRY

#5 | 2024-06-06
US20240185938A1
Physics

GLITCH DETECTION

#6 | 2024-06-06
US20240184929A1
Physics

IMMUTABLE CERTIFICATE FOR DEVICE IDENTIFIER COMPOSITION ENGINE

#7 | 2024-05-23
US20240169063A1
Physics

PREVENTING PROFILED SIDE CHANNEL ATTACKS

#8 | 2024-03-21
US20240096439A1
Physics

SELECTIVE PER DIE DRAM PPR FOR CXL TYPE 3 DEVICE

#9 | 2024-03-21
US20240096438A1
Physics

ERROR DETECTION, CORRECTION, AND MEDIA MANAGEMENT ON A DRAM DEVICE

#10 | 2024-03-21
US20240095120A1
Physics

ERROR DETECTION, CORRECTION, AND MEDIA MANAGEMENT ON A CXL TYPE 3 DEVICE

#11 | 2024-03-14
US20240087664A1
Physics

Built-in self-test burst patterns based on architecture of memory

#12 | 2024-03-14
US20240087663A1
Physics

Built-in self-test circuitry

#13 | 2024-02-29
US20240070283A1
Physics

SECURE BOOT PROCEDURE

#14 | 2024-02-29
US20240069620A1
Physics

Providing energy information to memory

#15 | 2024-02-22
US20240061792A1
Physics

DATA IDENTITY RECOGNITION FOR SEMICONDUCTOR DEVICES

#16 | 2024-02-01
US20240036762A1
Physics

BLOOM FILTER INTEGRATION INTO A CONTROLLER

#17 | 2024-01-25
US20240028249A1
Physics

Controllers and methods for accessing memory devices via multiple modes

#18 | 2024-01-04
US20240004760A1
Physics

Apparatus for redundant array of independent disks

#19 | 2023-12-21
US20230409242A1
Physics

Storage traffic pattern detection in memory devices

#20 | 2023-12-07
US20230396449A1
Electricity

DEVICE IDENTIFIER COMPOSITION ENGINE 3-LAYER ARCHITECTURE

#21 | 2023-12-07
US20230395184A1
Physics

Post package repair management

#22 | 2023-12-07
US20230394155A1
Physics

FIELD FIRMWARE UPDATE

#23 | 2023-12-07
US20230394140A1
Physics

Classification and mitigation of compute express link security threats

#24 | 2023-12-07
US20230393770A1
Physics

Memory device security and row hammer mitigation

#25 | 2023-11-16
US20230367663A1
Physics

Detecting page fault traffic

#26 | 2023-11-16
US20230367575A1
Physics

Techniques for managing offline identity upgrades

#27 | 2023-09-21
US20230297285A1
Physics

Row hammer telemetry

#28 | 2023-09-14
US20230290427A1
Physics

HOST CONTROLLED MEDIA TESTING OF MEMORY

#29 | 2023-09-14
US20230289270A1
Physics

HOST CONTROLLED ELECTRONIC DEVICE TESTING

#30 | 2023-09-07
US20230282258A1
Physics

Finite time counting period counting of infinite data streams

#31 | 2023-08-31
US20230274002A1
Physics

FIRMWARE AUTHENTICITY CHECK

#32 | 2023-03-30
US20230096375A1
Physics

Memory controller for managing data and error information

#33 | 2022-11-10
US20220357791A1
Physics

Providing energy information to memory

#34 | 2022-10-27
US20220342737A1
Physics

Detecting page fault traffic

#35 | 2022-10-20
US20220334773A1
Physics

Storage traffic pattern detection in memory devices

#36 | 2022-10-13
US20220326887A1
Physics

Log management maintenance operation and command

#37 | 2022-08-18
US20220261363A1
Physics

Controller for managing multiple types of memory

#38 | 2022-08-11
US20220253387A1
Physics

Memory tracing in an emulated computing system

#39 | 2022-06-30
US20220207193A1
Physics

Security management of ferroelectric memory device

#40 | 2022-02-17
US20220050734A1
Physics

Detecting page fault traffic

#41 | 2022-02-03
US20220035701A1
Physics

Maintenance command interfaces for a memory system

#42 | 2022-01-27
US20220027085A1
Physics

Storage traffic pattern detection in memory devices

#43 | 2021-12-30
US20210406411A1
Physics

Bus encryption for non-volatile memories

#44 | 2021-10-14
US20210319829A1
Physics

Dedicated commands for memory operations

#45 | 2021-06-24
US20210191887A1
Physics

Hybrid memory system interface

#46 | 2021-06-03
US20210166775A1
Physics

Data state synchronization

#47 | 2021-03-04
US20210064261A1
Physics

Multi-partitioning of memories

#48 | 2020-11-05
US20200348999A1
Physics

Transaction metadata

#49 | 2020-09-24
US20200301841A1
Physics

Latency-based storage in a hybrid memory system

#50 | 2020-09-17
US20200293211A1
Physics

Latency-based storage in a hybrid memory system

#51 | 2020-07-09
US20200218645A1
Physics

Storage class memory status

#52 | 2020-03-12
US20200082900A1
Physics

Data state synchronization involving memory cells having an inverted data state written thereto

#53 | 2020-03-12
US20200082883A1
Physics

Dedicated commands for memory operations

#54 | 2020-03-12
US20200081853A1
Physics

Hybrid memory system interface

#55 | 2020-02-27
US20200064903A1
Physics

Providing energy information to memory

#56 | 2019-10-24
US20190324843A1
Physics

Transaction metadata

#57 | 2019-09-26
US20190294547A1
Physics

Latency-based storage in a hybrid memory system

#58 | 2019-09-26
US20190294363A1
Physics

Latency-based storage in a hybrid memory system

#59 | 2019-09-26
US20190294356A1
Physics

Latency-based storage in a hybrid memory system

#60 | 2019-08-29
US20190266078A1
Physics

Storage class memory status

#61 | 2019-06-06
US20190171385A1
Physics

Multi-partitioning of memories

#62 | 2018-11-22
US20180336146A1
Physics

Providing energy information to memory

InventorID:

5315917 ⎘