Inventor profile of:

He CHEN

City:

Wuhan

Country:

China

Published Applications:

22

Last publication date:

2026-03-26

Top Assignees for applications by He CHEN

The entities that hold a legal rights for patent applications filed by inventor CHEN He:

Recent patent applications by CHEN He

He CHEN from Wuhan, CN has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-03-26
US20260089941A1
Electricity

SEMICONDUCTOR DEVICE, MEMORY DEVICE, AND MEMORY SYSTEM

#2 | 2026-03-19
US20260082542A1
Electricity

SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF

#3 | 2025-09-04
US20250280545A1
Electricity

WORD LINE PROTECTION METHOD IN THE BACKSIDE PROCESS OF A VERTICAL DYNAMIC RANDOM ACCESS MEMORY (DRAM) DEVICE

#4 | 2025-05-08
US20250151257A1
Electricity

SEMICONDUCTOR DEVICES AND FABRICATION METHODS THEREOF, AND MEMORY SYSTEMS

#5 | 2025-01-09
US20250015015A1
Electricity

THREE-DIMENSIONAL MEMORY DEVICES AND FABRICATING METHODS THEREOF

#6 | 2024-10-17
US20240349489A1
Electricity

SEMICONDUCTOR DEVICE, MEMORY SYSTEM AND FABRICATION METHOD OF A SEMICONDUCTOR DEVICE

#7 | 2024-08-08
US20240268119A1
Electricity

METHOD FOR FABRICATING THREE-DIMENSIONAL SEMICONDUCTOR DEVICE USING BURIED STOP LAYER IN SUBSTRATE

#8 | 2024-06-13
US20240196589A1
Electricity

MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

#9 | 2024-06-06
US20240188275A1
Electricity

MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

#10 | 2024-02-08
US20240049455A1
Electricity

MEMORY DEVICES AND METHODS FOR FORMING THE SAME

#11 | 2023-11-23
US20230380142A1
Electricity

MEMORY DEVICES HAVING VERTICAL TRANSISTORS AND FABRICATING METHODS THEREOF

#12 | 2023-11-16
US20230371244A1
Electricity

MEMORY DEVICE HAVING VERTICAL TRANSISTORS AND METHOD FOR FORMING THE SAME

#13 | 2023-10-19
US20230335521A1
Electricity

THREE-DIMENSIONAL NAND MEMORY DEVICE AND METHOD OF FORMING THE SAME

#14 | 2023-05-04
US20230132948A1
Electricity

SEMICONDUCTOR DEVICE, MEMORY DEVICE, AND MEMORY SYSTEM

#15 | 2022-10-06
US20220320132A1
Electricity

Method for fabricating three-dimensional semiconductor device using buried stop layer in substrate

#16 | 2022-08-04
US20220246544A1
Electricity

Three-dimensional memory devices and fabricating methods thereof

#17 | 2022-06-30
US20220208705A1
Electricity

Contact pads of three-dimensional memory device and fabrication method thereof

#18 | 2022-03-03
US20220068857A1
Electricity

Three-dimensional NAND memory device and method of forming the same

#19 | 2021-12-30
US20210407984A1
Electricity

Fabricating method of semiconductor device with exposed input/output pad in recess

#20 | 2021-03-04
US20210066274A1
Electricity

Semiconductor device with exposed input/output pad in recess

#21 | 2020-01-30
US20200035542A1
Electricity

Memory structure and method for forming the same

#22 | 2019-12-03
US16128520
Electricity

Memory structure and forming method thereof

InventorID:

5342155 ⎘