Poughkeepsie, New York
United States
13
2018-09-06
The entities that hold a legal rights for patent applications filed by inventor Maier Gary W.:
Gary W. Maier from Poughkeepsie, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Iterative N-detect based logic diagnostic technique
#2 | 2018-03-29Method of forming a temporary test structure for device fabrication
#3 | 2018-03-29Method of forming a temporary test structure for device fabrication
#4 | 2018-03-15Dynamic fault model generation for diagnostics simulation and pattern generation
#5 | 2017-11-30Built-in device testing of integrated circuits
#6 | 2017-09-14Method of forming a temporary test structure for device fabrication
#7 | 2017-08-03Iterative N-detect based logic diagnostic technique
#8 | 2017-07-13Dynamic fault model generation for diagnostics simulation and pattern generation
#9 | 2017-03-02Method of forming a temporary test structure for device fabrication
#10 | 2017-01-24Dynamic fault model generation for diagnostics simulation and pattern generation
#11 | 2014-08-28Phase change memory management
#12 | 2013-12-12Optimizing heat transfer in 3-D chip-stacks
#13 | 2013-11-21Physical design symmetry and integrated circuits enabling three dimentional (3D) yield optimization for wafer to wafer stacking
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