Boston, Massachusetts
United States
32
2021-02-11
The entities that hold a legal rights for patent applications filed by inventor Lee Brian:
Brian Lee from Boston, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Site matching for asset tracking
#2 | 2020-07-02Site matching for asset tracking
#3 | 2018-08-23Aircraft container tracking device
#4 | 2017-12-28Pattern recognition based motion detection for asset tracking system
#5 | 2016-11-24LOW POWER WIDE AREA NETWORK
#6 | 2016-11-03Wireless asset tracking systems with heterogeneous communication
#7 | 2016-09-08INTEGRATED SOLID STATE SCINTILLATOR DOSIMETER
#8 | 2016-07-14Aircraft container tracking device
#9 | 2016-04-14Asset tracking system activated by predetermined pattern of asset movement
#10 | 2015-10-15Asset tracking system having primary and secondary tracking devices
#11 | 2015-08-27System to extend battery power in remote tracking devices
#12 | 2015-08-20RADIATION EXPOSURE MONITORING DEVICE AND SYSTEM
#13 | 2014-08-21Power management system for aircraft container tracking device
#14 | 2014-07-03Methodology to extend battery power in asset-tracking device
#15 | 2014-07-03Method and apparatus for activation and deactivation of aircraft container tracking device
#16 | 2014-03-27Pattern recognition based motion detection for asset tracking system
#17 | 2014-01-16Light and RF transparent enclosure for use with asset tracking device
#18 | 2014-01-16Method and apparatus for asset tracking in constrained environments
#19 | 2013-12-05Asset tracking system activated by predetermined pattern of asset movement
#20 | 2013-12-05Asset tracking system with data ping based on asset movement
#21 | 2013-12-05WIRELESS DEVICE WITH HYBRID ENERGY CHARGING
#22 | 2013-12-05Asset tracking system with adjusted ping rate and ping period
#23 | 2013-12-05Method and system for airplane container tracking
#24 | 2012-06-21Non-volatile memory cell with lateral pinning
#25 | 2012-04-05VERTICAL TRANSISTOR MEMORY ARRAY
#26 | 2012-01-19Dual stage sensing for non-volatile memory
#27 | 2011-08-04Non-volatile memory cell with non-ohmic selection layer
#28 | 2011-07-28Magnetic stack design
#29 | 2011-01-13Defective bit scheme for multi-layer integrated memory device
#30 | 2011-01-13Non-volatile memory cell with non-ohmic selection layer
#31 | 2010-04-29Magnetic stack design
#32 | 2010-04-08Dual stage sensing for non-volatile memory
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