Austin, Texas
United States
17
2018-12-27
The entities that hold a legal rights for patent applications filed by inventor Quay Stephen T.:
Stephen T. Quay from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Integrated circuit buffering solutions considering sink delays
#2 | 2018-12-27Integrated circuit buffering solutions considering sink delays
#3 | 2018-12-27Integrated circuit buffering solutions considering sink delays
#4 | 2017-06-08Addressing coupled noise-based violations with buffering in a batch environment
#5 | 2014-11-04Physical synthesis optimization with fast metric check
#6 | 2014-08-07Automatic generation of wire tag lists for a metal stack
#7 | 2014-07-10Automatic generation of wire tag lists for a metal stack
#8 | 2014-04-10Early design cycle optimization
#9 | 2013-12-05Early design cycle optimzation
#10 | 2012-06-07Resolving global coupling timing and slew violations for buffer-dominated designs
#11 | 2009-10-15Concurrent buffering and layer assignment in integrated circuit layout
#12 | 2009-03-05BUFFER INSERTION TO REDUCE WIRELENGTH IN VLSI CIRCUITS
#13 | 2009-01-08BUFFER INSERTION TO REDUCE WIRELENGTH IN VLSI CIRCUITS
#14 | 2008-11-27Slew constrained minimum cost buffering
#15 | 2008-01-17Slew constrained minimum cost buffering
#16 | 2007-12-06System and Method of Eliminating Electrical Violations
#17 | 2007-11-22Buffer insertion to reduce wirelength in VLSI circuits
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