Inventor profile of:

Terence Hook

City:

Jericho Center, Vermont

Country:

United States

Published Applications:

20

Last publication date:

2025-09-25

Top Assignees for applications by Terence Hook

The entities that hold a legal rights for patent applications filed by inventor Hook Terence:

Recent patent applications by Hook Terence

Terence Hook from Jericho Center, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-09-25
US20250298073A1
Physics

SEMICONDUCTOR DEVICE WITH A PROTECTIVE DIODE CONNECTED TO A FUSE

#2 | 2025-01-02
US20250006736A1
Electricity

STACKED NANOSHEET FETS WITH GATE DIELECTRIC FILL

#3 | 2025-01-02
US20250006664A1
Electricity

THREE DIMENSIONAL MECHANICALLY BOLTING STAPLE FILL

#4 | 2025-01-02
US20250006663A1
Electricity

DOUBLE-SIDED INTEGRATED CIRCUIT WITH ELECTROSTATIC GUARD RING

#5 | 2025-01-02
US20250006629A1
Electricity

DOUBLE-SIDED INTEGRATED CIRCUIT WITH DAMAGE SENSOR

#6 | 2025-01-02
US20250006590A1
Electricity

DOUBLE-SIDED INTEGRATED CIRCUIT WITH STABILIZING CAGE

#7 | 2024-12-26
US20240429178A1
Electricity

MONOLITH STRUCTURE FOR BSPDN SEMICONDUCTOR DEVICES

#8 | 2024-12-12
US20240413164A1
Electricity

PASSIVE DEVICE WITH THINNER Si LAYER

#9 | 2024-12-05
US20240405112A1
Electricity

FVBP WITHOUT BACKSIDE Si RECESS

#10 | 2024-11-14
US20240379658A1
Electricity

STACKED FET VERTICAL DIODE

#11 | 2024-11-14
US20240379657A1
Electricity

STACKED DEVICES CONTAINING AT LEAST ONE LATERAL DIODE

#12 | 2024-10-31
US20240363617A1
Electricity

ELECTROSTATIC DISCHARGE USING BACKSIDE POWER DISTRIBUTION NETWORK

#13 | 2024-06-20
US20240203816A1
Electricity

HEAT DISSIPATION STRUCTURES FOR BONDED WAFERS

#14 | 2024-03-21
US20240096948A1
Electricity

STRUCTURE HAVING ENHANCED GATE RESISTANCE

#15 | 2024-03-21
US20240096871A1
Electricity

PROTECTION DIODE TO PREVENT CHARGE DAMAGE DURING MOL

#16 | 2023-12-21
US20230411241A1
Electricity

Heat pipe for vertically stacked field effect transistors

#17 | 2023-11-23
US20230378258A1
Electricity

METHOD AND STRUCTURE FOR A LOGIC DEVICE AND ANOTHER DEVICE

#18 | 2023-10-05
US20230317802A1
Electricity

High aspect ratio contact structure with multiple metal stacks

#19 | 2023-10-05
US20230317722A1
Electricity

Size-efficient mitigation of latchup and latchup propagation

#20 | 2023-03-02
US20230062945A1
Physics

Latch-up avoidance for sea-of-gates

InventorID:

5671054 ⎘