Inventor profile of:

Arun Murali

City:

Tempe, Arizona

Country:

United States

Published Applications:

10

Last publication date:

2025-05-01

Recent patent applications by Murali Arun

Arun Murali from Tempe, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-05-01
US20250137723A1
Mechanical engineering

CHAMBER BODIES HAVING MACHINED WALLS, CHAMBER ARRANGEMENTS AND SEMICONDUCTOR PROCESSING SYSTEMS HAVING CHAMBER BODIES WITH MACHINED WALLS, AND METHODS OF MAKING CHAMBER BODIES

#2 | 2025-04-03
US20250112064A1
Electricity

CHAMBER ARRANGEMENTS, SEMICONDUCTOR PROCESSING SYSTEMS INCLUDING CHAMBER ARRANGEMENTS AND RELATED MATERIAL LAYER DEPOSITION METHODS

#3 | 2025-04-03
US20250112042A1
Electricity

METHOD, SYSTEM AND APPARATUS FOR FORMING ANISOTROPIC LAYER

#4 | 2025-03-06
US20250079167A1
Electricity

METHODS OF FORMING SEMICONDUCTOR STRUCTURES, SEMICONDUCTOR PROCESSING SYSTEMS AND RELATED COMPUTER PROGRAM PRODUCTS

#5 | 2025-01-30
US20250034714A1
Chemistry; metallurgy

REFLECTORS, SEMICONDUCTOR PROCESSING SYSTEMS HAVING REFLECTORS, AND METHODS OF DEPOSITING MATERIAL LAYERS IN SEMICONDUCTOR PROCESSING SYSTEMS USING REFLECTORS

#6 | 2024-10-24
US20240355688A1
Electricity

SYSTEMS AND METHODS FOR DEPOSITING MATERIAL LAYERS ONTO SUBSTRATES

#7 | 2024-05-30
US20240175138A1
Chemistry; metallurgy

SYSTEMS AND METHODS FOR CONTROLLING PRESSURE IN SUBSTRATE PROCESSING SYSTEMS

#8 | 2024-02-29
US20240068103A1
Chemistry; metallurgy

CHAMBER ARRANGEMENTS, SEMICONDUCTOR PROCESSING SYSTEMS HAVING CHAMBER ARRANGEMENTS, AND RELATED MATERIAL LAYER DEPOSITION METHODS

#9 | 2023-08-24
US20230265582A1
Chemistry; metallurgy

SYSTEMS AND METHODS FOR PROCESSING THE SURFACE OF AN EPITAXIALLY GROWN SILICON FILM USING A RADICAL SPECIES

#10 | 2023-04-27
US20230125884A1
Electricity

MATERIAL LAYER DEPOSITION METHODS, SEMICONDUCTOR PROCESSING SYSTEMS, AND RELATED COMPUTER PROGRAM PRODUCTS

InventorID:

5720573 ⎘