Inventor profile of:

Gary E. Strait

City:

Poughkeepsie, New York

Country:

United States

Published Applications:

23

Last publication date:

2024-02-22

Top Assignees for applications by Gary E. Strait

The entities that hold a legal rights for patent applications filed by inventor Strait Gary E.:

Recent patent applications by Strait Gary E.

Gary E. Strait from Poughkeepsie, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2024-02-22
US20240061803A1
Physics

SERIALIZED BROADCAST COMMAND MESSAGING IN A DISTRIBUTED SYMMETRIC MULTIPROCESSING (SMP) SYSTEM

#2 | 2020-08-27
US20200272357A1
Physics

Queue management for multiway queues

#3 | 2018-10-25
US20180307628A1
Physics

Deadlock avoidance in a multi-processor computer system with extended cache line locking

#4 | 2016-07-28
US20160217077A1
Physics

Maintaining order with parallel access data streams

#5 | 2016-05-05
US20160124854A1
Physics

Increased bandwidth of ordered stores in a non-uniform memory subsystem

#6 | 2016-05-05
US20160124653A1
Physics

Increased bandwidth of ordered stores in a non-uniform memory subsystem

#7 | 2015-09-17
US20150261638A1
Physics

Matrix and compression-based error detection

#8 | 2015-09-17
US20150261569A1
Physics

Dual/multi-mode processor pipeline sampling

#9 | 2015-09-17
US20150261533A1
Physics

Dual/multi-mode processor pipelines sampling

#10 | 2015-09-17
US20150260792A1
Physics

Matrix and compression-based error detection

#11 | 2013-12-19
US20130339823A1
Electricity

Bad wordline/array detection in memory

#12 | 2013-12-19
US20130339822A1
Electricity

Bad wordline/array detection in memory

#13 | 2011-12-29
US20110320892A1
Physics

Memory error isolation and recovery in a multiprocessor computer system

#14 | 2011-12-29
US20110320743A1
Physics

Memory ordered store system in a multiprocessor computer system

#15 | 2011-10-20
US20110258394A1
Physics

Merging data in an L2 cache memory

#16 | 2010-12-23
US20100325321A1
Physics

Method, system and computer program product for enhanced shared store buffer management scheme with limited resources for optimized performance

#17 | 2009-09-24
US20090240891A1
Physics

Method, system and computer program product for data buffers partitioned from a cache array

#18 | 2009-08-27
US20090216915A1
Physics

Method, system, and computer program product for merging data

#19 | 2009-08-13
US20090204734A1
Physics

Method, system and computer program product for enhanced shared store buffer management scheme for differing buffer sizes with limited resources for optimized performance

#20 | 2008-07-10
US20080168202A1
Physics

Directly initiating by external adapters the setting of interruption initiatives

#21 | 2008-06-03
US10422864
-

Distributed shared resource management

#22 | 2006-08-01
US10436491
-

Memory management for a symmetric multiprocessor computer system

#23 | 2005-01-20
US20050015437A1
Electricity

Peer to peer job monitoring and control in grid computing systems

InventorID:

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